74HCT6323A

Features: · 8-pin space saving package· Programmable 3-stage ripple counter· Suitable for over-tone crystal application up to 50 MHz VCC = 5 V ± 10%)· 3-state output buffer· Two internal capacitors· Recommended operating range for se with third overtone crystals to 6 V· Oscillator stop function (M...

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SeekIC No. : 004250940 Detail

74HCT6323A: Features: · 8-pin space saving package· Programmable 3-stage ripple counter· Suitable for over-tone crystal application up to 50 MHz VCC = 5 V ± 10%)· 3-state output buffer· Two internal capacitors·...

floor Price/Ceiling Price

Part Number:
74HCT6323A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/29

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Product Details

Description



Features:

· 8-pin space saving package
· Programmable 3-stage ripple counter
· Suitable for over-tone crystal application up to 50 MHz VCC = 5 V ± 10%)
· 3-state output buffer
· Two internal capacitors
· Recommended operating range for se with third overtone crystals to 6 V
· Oscillator stop function (MR)
· Output capability:bus driver ® (15 LSTTL) ICC category: MSI.



Application

· Control counters
· Timers
· Frequency dividers
· Time-delay circuits
· CIO (Compact Integrated scillator)
· Third-overtone crystal operation.



Pinout

  Connection Diagram


Description

The74HCT6323A is high-speed i-gate CMOS devices.

They are specified in compliance with EDEC standard no. 7A.

The 74HCT6323A is oscillators esigned for quartz crystal combined ith a programmable 3-state counter, 3-state output buffer and an verriding asynchronous master eset (MR). With the two select inputs 1 and S2 the counter can be witched in the divide-by-1, 2, 4 or 8 ode. If left floating the clock is ivided by 8. The oscillator is esigned to operate either in the undamental or third overtone mode epending on the crystal and external omponents applied. On-chicapacitors minimize external omponent count for third overtone rystal applications.

The oscillator of the 74HCT6323A may be replaced by an xternal clock signal at input X1. In his event the other oscillator pin (X2) ust be floating. The counter dvances on the negative-going ransition of X1. A LOW level on MR esets the counter, stops the oscillatorand sets the output buffer in the -state condition.MR can be left loating since an internal pull-up esistor will make the MR inactive. In he HCT version, the MR input and he two mode select pins S1 and S2 re TTL compatible, but the X1 input as CMOS input switching levels and ay be driven by a TTL output using pull-up resistor connected to VCC.




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