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MFG:PHI


Part Number: 74HCT74
MFG: PHI
Description: The 74HC/HCT74 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (...
MFG:PHI


MFG: PHI
Description: The 74HC/HCT74 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (...
The 74HC/HCT74 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT74 are dual positive-edge triggered, D-type flip-flops with individual data (D) inputs, clock (CP) inputs, set (SD) and reset (RD) inputs; also complementary Q and Q outputs.
The set and reset are asynchronous active LOW inputs and operate independently of the clock input. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The D inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation.
Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.
| SYMBOL | PARAMETER | CONDITIONS | MIN. | MAX. | UNIT |
| VCC | supply voltage | -0.5 | +7.0 | V | |
| IIK | input diode current | VI < -0.5 V or VI > VCC + 0.5 V;note 1 | - | ±20 | mA |
| IOK | output diode current | VO < -0.5 V or VO > VCC + 0.5 V;note 1 | - | ±20 | mA |
| IO | output source or sink current | -0.5 V < VO < VCC + 0.5 V; note 1 | - | ±25 | mA |
| ICC, IGND | VCC or GND current | - | ±100 | mA | |
| Tstg | storage temperature | -65 | +150 | ||
| Ptot | power dissipation | Tamb = -40 to +125 ; note 2 | - | 500 | mW |
74HCT74DB
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