74HCT7404

Features: · Synchronous or asynchronous operation· 3-state outputs· 30 MHz (typical) shift-in and shift-out rates· Readily expandable in word and bit dimensions· Pinning arranged for easy board layout: input pins directly opposite output pins· Output capability: driver (8 mA)· ICC category: LSI.Ap...

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74HCT7404 Picture
SeekIC No. : 004250952 Detail

74HCT7404: Features: · Synchronous or asynchronous operation· 3-state outputs· 30 MHz (typical) shift-in and shift-out rates· Readily expandable in word and bit dimensions· Pinning arranged for easy board layo...

floor Price/Ceiling Price

Part Number:
74HCT7404
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/29

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Product Details

Description



Features:

· Synchronous or asynchronous operation
· 3-state outputs
· 30 MHz (typical) shift-in and shift-out rates
· Readily expandable in word and bit dimensions
· Pinning arranged for easy board layout: input pins directly opposite output pins
· Output capability: driver (8 mA)
· ICC category: LSI.



Application

· High-speed disc or tape controller
· Communications buffer.



Pinout

  Connection Diagram


Description

The 74HCT7404 is high-speed Si-gate CMOS devices specified in compliance with JEDEC standard no.7A.

The "7404" is an expandable, First-In First-Out (FIFO) memory organized as 64 words by 5 bits. A guaranteed 15 MHz data-rate makes it ideal for high-speed applications. A higher data-rate can be obtained in applications where the status flags are not used (burst-mode).

With separate controls of the 74HCT7404 for shift-in (SI) and shift-out (SO), reading and writing operations are completely independent, allowing synchronous and asynchronous data transfers. Additional controls include a master-reset input (MR), an output enable input (OE) and flags. The data-in-ready (DIR) and data-out-ready (DOR) flags indicate the status of the device.




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