74HCT9323AD

Features: • 8-pin space saving package• Programmable 3-stage ripple counter• Suitable for over-tone crystal application up to 85MHz (VCC = 5V10%)• 3-State output buffer• Two internal capacitors<BR>• Recommended operating range for use with third overtone ...

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SeekIC No. : 004250965 Detail

74HCT9323AD: Features: • 8-pin space saving package• Programmable 3-stage ripple counter• Suitable for over-tone crystal application up to 85MHz (VCC = 5V10%)• 3-State output buffer̶...

floor Price/Ceiling Price

Part Number:
74HCT9323AD
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/29

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Product Details

Description



Features:

• 8-pin space saving package
• Programmable 3-stage ripple counter
• Suitable for over-tone crystal application up to 85MHz (VCC = 5V10%)
• 3-State output buffer
• Two internal capacitors<BR>• Recommended operating range for use with third overtone crystals 3V to 6V
• Oscillator stop function (MR)
• Output capability: bus driver (15 LSTTL)
• ICC category: MSI



Pinout

  Connection Diagram


Description

The 74HCT9323AD is high-speed Si-gate CMOS devices. They are specified in compliance with JEDEC standard no. 7A.

The 74HCT9323AD is oscillators designed for quartz crystal combined with a programmable 3-State counter, a 3-State output buffer and an overriding asynchronous master reset (MR). With the two select inputs S1 and S2 the counter can be switched in the divide-1, 2, 4 or 8 mode. If left floating the clock is divided by 8. The oscillator is designed to operate either in the fundamental or third overtone mode depending on the crystal and external components applied. On-chip capacitors minimize external component count for third overtone crystal applications.

The oscillator of the 74HCT9323AD may be replaced by an external clock signal at input X1. In this event the other oscillator pin (X2) must be floating. The counter advances on the negative-going transition of X1. A LOW level on MR resets the counter, stops the oscillator and sets the output buffer in the 3-State condition. MR can be left floating since an internal pull-up resistor will make the MR inactive. In the HCT version, the MR input and the two mode select pins S1 and S2 are TTL compatible, but the X1 input of the 74HCT9323AD has CMOS input switching levels and may be driven by a TTL output using a pull-up resistor connected to VCC.


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