74LCX112

Features:

 5V tolerant inputs
 2.3V3.6V V_CC specifications provided
7.5 ns tPD max (V_CC = 3.3V), 10 µA I_CC max
Power down high impedance inputs and outputs
±24 mA output drive (V_CC = 3.0V)
Implements patented noise/EMI reduction circuitry
 Latch-up performance exceeds 500 mA
 ESD performance:
   Human body model > 2000V
   Machine model > 2000V


Pinout




Specifications

Symbol	Parameter	Value	Conditions	Units
VCC	Supply Voltage	−0.5 to +7.0		V
VI	DC Input Voltage	−0.5 to +7.0		V
VO	DC Output Voltage	−0.5 to VCC + 0.5	Output in HIGH or LOW State (Note2)	V
IIK	DC Input Diode Current	−50	VI < GND	mA
IOK	DC Output Diode Current	−50 +50	VO < GND VO > VCC	mA
IO	DC Output Source/Sink Current	±50		mA
ICC	DC Supply Current per Supply Pin	±100		mA
IGND	DC Ground Current per Ground Pin	±100		mA
TSTG	Storage Temperature	−65 to +150		°C

Description

   The  74LCX112 is a dual J-K flip-flop. Each flip-flop has independent J, K, PRESET, CLEAR, and CLOCK inputs with Q, Q outputs. These devices are edge sensitive and change state on the negative going transition of the clock pulse.

   Clear and preset are independent of the clock and accomplished by a low logic level on the corresponding input. LCX devices are designed for low voltage (3.3V or 2.5)
operation with the added capability of interfacing to a 5V signal environment.

   The 74LCX112 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.