74LCX162373

Features:

 5V tolerant inputs and outputs
2.3V3.6V V_CC specifications provided
 Equivalent 26Ω series resistor outputs
6.2 ns t_PD max (V_CC = 3.3V), 20 µA I_CC max
Power down high impedance inputs and outputs
Supports live insertion/withdrawal (Note 1)
±12 mA output drive (V_CC = 3.0V)
Implements patented noise/EMI reduction circuitry
Latch-up performance exceeds 500 mA
 ESD performance:
   Human body model > 2000V
   Machine model > 200V
Also packaged in plastic Fine-Pitch Ball Grid Array(FBGA) (Preliminary)


Pinout




Specifications

Symbol	Parameter	Value	Conditions	Units
VCC	Supply Voltage	−0.5 to +7.0		V
VI	DC Input Voltage	−0.5 to +7.0		V
VO	DC Output Voltage	−0.5 to +7.0 −0.5 to VCC +0.5	Output in3-STATE Output in HIGH or LOW State (Note5)	V
IIK	DC Input Diode Current	−50	VI < GND	mA
IOK	DC Output Diode Current	−50 +50	VO < GND VO > VCC	mA
IO	DC Output Source/Sink Current	±50		mA
ICC	DC Supply Current per Supply Pin	±100		mA
IGND	DC Ground Current per Ground Pin	±100		mA
TSTG	Storage Temperature	−65 to +150		°C

Description

   The 74LCX162373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear transparent to the data when the Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the outputs are in a high impedance state.

   The 74LCX162373 is designed for low voltage (2.5V or 3.3V) V_CC applications with capability of interfacing to a 5V signal environment. The 26Ω series resistor in the output helps reduce output overshoot and undershoot.

   The 74LCX162373 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.