Features: ` 5V tolerant inputs and outputs` 2.3V3.6V VCC specifications provided` 5.4 ns tPD max (VCC = 3.3V), 20 µA ICC max` Power down high impedance inputs and outputs` Supports live insertion/withdrawal (Note 1)` ±24 mA output drive (VCC = 3.0V)` Uses patented noise/EMI reduction circuit...
74LCX32373: Features: ` 5V tolerant inputs and outputs` 2.3V3.6V VCC specifications provided` 5.4 ns tPD max (VCC = 3.3V), 20 µA ICC max` Power down high impedance inputs and outputs` Supports live insert...
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Gates (AND / NAND / OR / NOR) Quad 2-Input NAND Gate with 5V Tol Inp
| Symbol | Parameter | Value | Condition | Unit |
| VCC | DC Supply Voltage | 0.5 to +7.0 | V | |
| VI | DC Input Voltage | 0.5 to +7.0 | V | |
| VO | DC Output Voltage | 0.5 to +7.0 0.5 to VCC + 0.5 |
Output in 3-STATE Output in HIGH or LOW State (Note 5) |
V |
| IIK | DC Input Diode Current | 50 | VI < GND | mA |
| IOK | DC Output Diode Current | 50 | VO < GND | mA |
| +50 | VO > VCC | mA | ||
| IO | DC Output Source/Sink Current | +50 | mA | |
| ICC | DC Supply Current Per Supply Pin | ±100 | mA | |
| IGND | DC Ground Current Per Ground Pin | ±100 | mA | |
| TSTG | Storage Temperature Range | 65 to +150 | °C |
The 74LCX32373 contains thirty-two non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear transparent to the data when the Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW.
WhenOE is HIGH, the outputs are in a high impedance state. The 74LCX32373 is designed for low voltage (2.5V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment.
The 74LCX32373 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.