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74LCX841

Features: 5V tolerant inputs and outputs2.3V − 3.6V VCC specifications provided8.0 ns tPD max (VCC = 3.3V), 10 µA ICC maxPower-down high impedance inputs and outputsSupports live insertion/withdrawal (Note 1)±24 mA output drive (VCC = 3.0V)Implements patented noise/EMI reduction circui...

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SeekIC No. : 004251036 Detail

74LCX841: Features: 5V tolerant inputs and outputs2.3V − 3.6V VCC specifications provided8.0 ns tPD max (VCC = 3.3V), 10 µA ICC maxPower-down high impedance inputs and outputsSupports live inserti...

74LCX841 Data Sheet

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Part Number:
74LCX841
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

5V tolerant inputs and outputs
2.3V − 3.6V VCC specifications provided
8.0 ns tPD max (VCC = 3.3V), 10 µA ICC max
Power-down high impedance inputs and outputs
Supports live insertion/withdrawal (Note 1)
±24 mA output drive (VCC = 3.0V)
Implements patented noise/EMI reduction circuitry
Latch-up performance exceeds 500 mA
ESD performance:
    Human Body Model > 2000V
    Machine Model > 200V


Pinout

Connection Diagram


Specifications

Symbol Parameter Value Conditions Units
VCC Supply Voltage −0.5 to +7.0   V
VI DC Input Voltage −0.5 to +7.0   V
VO DC Output Voltage −0.5 to +7.0
−0.5 to VCC + 0.5 		Output in 3-STATE
Output in HIGH or LOW State (Note 3)		 mA
IIK DC Input Diode Current −50 VI < GND mA
IOK DC Output Diode Current −50
+50 		VO < GND
VO > VCC		 mA
IO DC Output Source/Sink Current ±50   mA
ICC DC Supply Current per Supply Pin ±100   mA
IGND DC Ground Current per Ground Pin ±100   mA
TSTG Storage Temperature −65 to +150   °C



Description

The 74LCX841 consists of ten latches with 3-STATE outputs for bus organized system applications. The 74LCX841 is designed for low voltage (2.5V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment.

The 74LCX841 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.




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