74LCXZ16244 General Description
The LCXZ16244 contains sixteen non-inverting buffers with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation.
When VCC is between 0 and 1.5V, the LCXZ12644 is in the high impedance state during power up or power down. This places the outputs in high impedance (Z) state preventing intermittent low impedance loading or glitching in bus oriented applications.
The LCXZ16244 is designed for low voltage (2.7V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment.
The LCXZ16244 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.
74LCXZ16244 Maximum Ratings
74LCXZ16244 Features
`5V tolerant inputs and outputs
`Guaranteed power up/down high impedance
`Supports live insertion/withdrawal
`2.7V3.6V VCC specifications provided
`4.5 ns tPD max (VCC = 3.0V), 20 µA ICC max
`±24 mA output drive (VCC = 3.0V)
`Implements patented noise/EMI reduction circuitry
`Latch-up performance exceeds 500 mA
`ESD performance: Human body model > 2000V Machine model > 200V
74LCXZ16244 Connection Diagram
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