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MFG:430 Package Cooled:99/00+ D/C:TSSOP16
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74LV251
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DataSheet
General Description
74LV251 Maximum Ratings
| SYMBOL | PARAMETER | CONDITIONS | RATING | UNIT |
| VCC | DC supply voltage | 0.5 to +4.6 | V | |
| ±IIK | DC input diode current | VI < 0.5 or VI > VCC + 0.5V | 20 | mA |
| ±IOK | DC output diode current | VO < 0.5 or VO > VCC + 0.5V | 50 | mA |
| ±IO | DC output source or sink current bus driver outputs |
0.5V < VO < VCC + 0.5V | 25 | mA |
| ±IGND, ±ICC |
DC VCC or GND current for types with bus driver outputs |
50 | mA | |
| Tstg | Storage temperature range | 65 to +150 | °C | |
| Ptot | Power dissipation per package plastic DIL plastic mini-pack (SO) plastic shrink mini-pack (SSOP and TSSOP) |
for temperature range: 40 to +125°C above +70°C derate linearly with 12mW/K above +70°C derate linearly with 8 mW/K above +60°C derate linearly with 5.5 mW/K |
750 500 400 |
mW |
74LV251 Features
• Optimized for low voltage applications: 1.0 to 3.6 V
• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
• Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, Tamb = 25°C
• Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, Tamb = 25°C
• True and complement outputs
• Both outputs are 3-State for further multiplexer expansion
• Multifunction capability
• Permits multiplexing from n-lines to one line
• Output capability: standard
• ICC category: MSI
• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
• Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, Tamb = 25°C
• Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, Tamb = 25°C
• True and complement outputs
• Both outputs are 3-State for further multiplexer expansion
• Multifunction capability
• Permits multiplexing from n-lines to one line
• Output capability: standard
• ICC category: MSI
74LV251 Typical Application
The 74LV251 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT251.
The 74LV251 is an 8-input multiplexer with 8 binary inputs (I0 to I7), an output enable input (OE) and three select inputs (S0, S1, S2). One of the eight binary inputs is selected by the select inputs and is routed to the outputs (Y, Y). Both outputs are in the high impedance OFF-state (Z) when the output enable input is HIGH, allowing multiplexer expansion by tying the outputs.
74LV251 Connection Diagram
74LV251
PDF/DataSheet Download
- Datasheet: 74LV251
- File Size: 129386 KB
- Manufacturer: Philips
- Click here to Download
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74LV245N
The 74LV245N belongs to 74LV245 family which is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT245. The 74LV245 is an octal transceiver featuring non-inverting 3-State bus compatible outputs in both send and receive directi...
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