74LV595 General Description
The 74LV595 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT595.
The74LV595 is an 8-stage serial shift register with a storage register and 3-State outputs. The shift register and storage register have separate clocks.
Data is shifted on the positive-going transitions of the SHCP input.
The data in each register is transferred to the storage register on a positive-going transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register.
The shift register has a serial input (DS) and a serial standard output (Q7') all for cascading. It is also provided with asynchronous reset (active LOW) for all 8 shift register stages. The storage register has 8 parallel 3-State bus driver outputs. Data in the storage register appears at the output whenever the output enable input (OE) is LOW.
74LV595 Features
• Optimized for Low Voltage applications: 1.0V to 3.6V
• Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V
• Typical VOLP (output ground bounce) < 0.8V at VCC = 3.3V, Tamb = 25°C
• Typical VOHV (output VOH undershoot) > 2V at VCC = 3.3V, Tamb = 25°C
• 8-bit serial input
• 8-bit serial or parallel output
• Storage register with 3-State outputs
• Shift register with direct clear
• Output capability:
parallel outputs; bus driver
serial output; standard
• ICC category: MSI
74LV595 Typical Application
• Serial-to-parallel data conversion
• Remote control holding register
74LV595 Connection Diagram
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