74LVT374D

Flip Flops 3.3V OCT D-TYPE 3-S

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74LVT374D Picture
SeekIC No. : 00431642 Detail

74LVT374D: Flip Flops 3.3V OCT D-TYPE 3-S

floor Price/Ceiling Price

Part Number:
74LVT374D
Mfg:
NXP Semiconductors
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/27

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Product Details

Quick Details

Number of Circuits : 1 Logic Family : LVT
Logic Type : D-Type Edge Triggered Flip-Flop Polarity : Non-Inverting
Input Type : Single-Ended Propagation Delay Time : 3.5 ns at 3.3 V
High Level Output Current : - 32 mA Supply Voltage - Max : 3.6 V
Maximum Operating Temperature : + 85 C Mounting Style : SMD/SMT
Package / Case : SOT-163 Packaging : Tube    

Description

Output Type :
Low Level Output Current :
Number of Circuits : 1
Supply Voltage - Max : 3.6 V
Mounting Style : SMD/SMT
Polarity : Non-Inverting
Input Type : Single-Ended
Maximum Operating Temperature : + 85 C
Packaging : Tube
Package / Case : SOT-163
High Level Output Current : - 32 mA
Logic Type : D-Type Edge Triggered Flip-Flop
Logic Family : LVT
Propagation Delay Time : 3.5 ns at 3.3 V


Description

The 74LVT374D belongs to 74LVT374. The 74LVT374 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74LVT374 is an 8-bit, edge triggered register coupled to eight 3-State output buffers. The two sections of the device are controlled independently by the clock (CP) and Output Enable (OE) control gates. The register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop's Q output. The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. The active-Low Output Enable (OE) controls all eight 3-State buffers independent of the clock operation. When OE is low, the stored data appears at the outputs. When OE is high, the outputs are in the High-impedance "OFF" state, which means they will neither drive nor load the bus.

The features of 74LVT374D can be summarized as (1)inputs and outputs on opposite side of package allow easy interface to microprocessors; (2)3-State outputs for bus interfacing; (3)common output enable; (4)TTL input and output switching levels; (5)input and output interface capability to systems at 5V supply; (6)bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs; (7)live insertion/extraction permitted; (8)no bus current loading when output is tied to 5V bus; (9)power-up 3-State; (10)power-up reset; (11)latch-up protection exceeds 500mA per JEDEC Std 17; (12)ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per machine model.

The absolute maximum ratings of 74LVT374D are (1)VCC DC supply voltage: -0.5 to +4.6 V; (2)±IIK DC input diode current(VI < 0): -50mA; (3)VI DC input voltage: -0.5 to +7.0 V; (4)IOK DC output diode current(VI < 0): -50mA; (5)VOUT DC output voltage(output in off or high state): -0.5 to +7.0 V; (6)IOUT DC output current (Output in Low state/Output in High state): 128/-64mA; (7)Tstg storage temperature range: -65 to +150 °C.(1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditionso is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.)




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