Low Level Output Current
:
Minimum Operating Temperature
: - 40 C
Polarity
: Non-Inverting
Number of Output Lines
: 3
Maximum Operating Temperature
: + 85 C
Packaging
: Tube
Supply Voltage - Max
: 3.6 V
Package / Case
: TSSOP-48
Logic Type
: Transparent Latch
High Level Output Current
: - 32 mA
Number of Circuits
: 2
Supply Voltage - Min
: 2.7 V
Logic Family
: 74LVT
Propagation Delay Time
: 4.3 ns at 2.7 V, 3.9 ns at 3.3 V
Features: Input and output interface capability to systems at 5V VCC
Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs (74LVTH16373), also available without bushold feature (74LVT16373)
Live insertion/extraction permitted
Power Up/Power Down high impedance provides glitch-free bus loading
Outputs source/sink 32 mA/64 mA
Functionally compatible with the 74 series 16373
Latch-up performance exceeds 500 mA
ESD performance:
Human-body model ! 2000V
Machine model ! 200V
Charged-device model ! 1000V
Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) (Preliminary)Pinout
Specifications
| Symbol |
Parameter |
Value |
Conditions |
Units |
| VCC |
Supply Voltage |
−0.5 to +4.6 |
|
V |
| VI |
DC Input Voltage |
−0.5 to +7.0 |
|
V |
| VO |
DC Output Voltage |
−0.5 to +7.0
|
Output in 3-STATE
|
V |
| −0.5 to +7.0 |
Output in HIGH or LOW State (Note 4) |
| IIK |
DC Input Diode Current |
−50 |
VI < GND |
mA |
| IOK |
DC Output Diode Current |
−50
|
VO < GND
|
mA |
| IO |
DC Output Source/Sink Current |
64 |
VO > VCC Output at HIGH State |
mA |
| 128 |
VO > VCC Output at LOW State |
| ICC |
DC Supply Current per Supply Pin |
±64 |
|
mA |
| IGND |
DC Ground Current per Ground Pin |
±128 |
|
mA |
| TSTG |
Storage Temperature |
−65 to +150 |
|
°C |
DescriptionThe 74LVTH16373MTD contain sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear transparent to the data when the Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the outputs are in a high impedance state.
The 74LVTH16373MTD data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs.
These latches are designed for low-voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVT16373 and 74LVTH16373MTD are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining a low power dissipation.
Parameters: | Technical/Catalog Information | 74LVTH16373MTD |
| Vendor | Fairchild Semiconductor |
| Category | Integrated Circuits (ICs) |
| Logic Type | D-Type Transparent Latch |
| Independent Circuits | 2 |
| Circuit | 8:8 |
| Output Type | Tri-State |
| Current - Output High, Low | 32mA, 64mA |
| Mounting Type | Surface Mount |
| Package / Case | 48-TSSOP |
| Packaging | Tube |
| Operating Temperature | -40°C ~ 85°C |
| Delay Time - Propagation | 1.5ns |
| Voltage - Supply | 2.7 V ~ 3.6 V |
| Lead Free Status | Lead Free |
| RoHS Status | RoHS Compliant |
| Other Names | 74LVTH16373MTD
74LVTH16373MTD
|
74LVTH16373MTD Data Sheet
