Features: HIGH SPEED: tPD = 5.5ns (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL: VIL=0.8V, VIH=2V at VCC=3V LOW POWER DISSIPATION: ICC = 4 A (MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAY...
74LVX594: Features: HIGH SPEED: tPD = 5.5ns (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL: VIL=0.8V, VIH=2V at VCC=3V LOW POWER DISSIPATION: ICC = 4 A (MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (...
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Symbol | Parameter | Value | Unit |
VCC | Supply Voltage | -0.5 to +7.0 | V |
VI | DC Input Voltage | -0.5 to +7.0 | V |
VO | DC Output Voltage | -0.5 to VCC + 0.5 | V |
IIK | DC Input Diode Current | -20 | mA |
IOK | DC Output Diode Current | ± 20 | mA |
IO | DC Output Current | ± 25 | mA |
ICC or IGND | DC VCC or Ground Current | ± 50 | mA |
Tstg | Storage Temperature | -65 to +150 | °C |
TL | Lead Temperature (10 sec) | 300 | °C |
SHIFT REGISTER WITH OUTPUT REGISTER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications.
This 74LVX594 contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks and direct overriding clear (SCLR, RCLR) are provided for both the shift register and the storage register. A serial (QH') output is provided for cascading purposes. Both the shift register and storage register use positive-edge triggered clocks. If the clocks are connected together, the shift register state of the 74LVX594 will always be one clock pulse ahead of the storage register.
Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V system. It combines high speed performance with the true CMOS low power consumption.
All inputs and outputs of the 74LVX594 are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.