74V1G02

Features:

 HIGHSPEED: t_PD = 3.6 ns (TYP.) atV_CC= 5V
LOWPOWERDISSIPATION:I_CC =1 mA (MAX.) at T_A =25 oC
HIGHNOISEIMMUNITY:V_NIH=V_NIL =28%V_CC (MIN.)
POWERDOWN PROTECTIONON INPUTS
SYMMETRICAL OUTPUT IMPEDANCE:|I_OH| = I_OL = 8 mA(MIN)
BALANCEDPROPAGATIONDELAYS:t_PLH  t_PHL
OPERATINGVOLTAGERANGE:V_CC (OPR)= 2V to 5.5V
IMPROVEDLATCH-UP IMMUNITY DESCRIPTION



Pinout




Specifications

Symbol	Parameter	Value	Unit
VCC	Supply Voltage	-0.5 to +7.0	V
VI	DC Input Voltage	-0.5 to +7.0	V
VO	DC Output Voltage	-0.5 to VCC + 0.5	V
IIK	DC Input Diode Current	- 20	mA
IOK	DC Output Diode Current	± 20	mA
IO	DC Output Current	± 25	mA
ICC or IGND	DC VCC or Ground Current	± 50	mA
Tstg	Storage Temperature	-65 to +150	oC
TL	Lead Temperature (10 sec)	260	oC

Description

   The 74V1G02 is an advanced high-speed CMOS SINGLE 2-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C²MOS technology.

   The internal circuit of the 74V1G02 is composed of 3 stages including buffer output, which provide high noise immunity and stable output.

   Power down protection of the 74V1G02 is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.