80960HD

Features: 32-Bit Parallel Architecture-Load/StoreArchitecture-Sixteen32-Bit Global Registers-Sixteen32-Bit Local Registers-1.28GbyteInternalBandwidth (80MHz)-On-Chip Register CacheProcessor Core Clock-80960HA is1xBus Clock-80960HD is2xBus Clock-80960HTis3xBusClockBinary CompatiblewithOther 80960 P...

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80960HD Picture
SeekIC No. : 004253649 Detail

80960HD: Features: 32-Bit Parallel Architecture-Load/StoreArchitecture-Sixteen32-Bit Global Registers-Sixteen32-Bit Local Registers-1.28GbyteInternalBandwidth (80MHz)-On-Chip Register CacheProcessor Core Clo...

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Part Number:
80960HD
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/3/27

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Product Details

Description



Features:

32-Bit Parallel Architecture
-Load/StoreArchitecture
-Sixteen32-Bit Global Registers
-Sixteen32-Bit Local Registers
-1.28GbyteInternalBandwidth (80MHz)
-On-Chip Register Cache
Processor Core Clock
-80960HA is1xBus Clock
-80960HD is2xBus Clock
-80960HTis3xBusClock
Binary CompatiblewithOther 80960 Processors
IssueUp To 150MillionInstructionsper Second
High-Performance On-ChipStorage
-16Kbyte Four-WaySet-Associative InstructionCache
-8KbyteFour-WaySet-AssociativeData Cache
-2 Kbyte General Purpose RAM
-Separate 128-Bit Internal PathsFor Instructions/Data
3.3V Supply Voltage
-5 V Tolerant Inputs
-TTL CompatibleOutputs Guarded Memory Unit
-Provides MemoryProtection
-User/SupervisorRead/Write/Execute
32-Bit DemultiplexedBurst Bus
-Per-Byte ParityGeneration/Checking
-AddressPipeliningOption
-Fully Programmable Wait State Generator
-Supports8-,16-or32-Bit BusWidths
-160Mbyte/s External Bandwidth (40MHz) High-SpeedInterrupt Controller
-Up to240External Interrupts
-31Fully Programmable Priorities
-Separate, Non-maskable Interrupt Pin Dual On-Chip32-Bit Timers
-Auto ReloadCapabilityandOne-Shot
-CLKIN Prescaling,÷1,2, 4or8
-JTAG Support - IEEE 1149.1 Compliant




Pinout

Thissection definesthe 80960Hx pins. Table 6presentsthe legendforinterpreting thepin descriptionsinTable 7. All pinsfloat whilethe processor isinthe ONCE mode, except TDO,whichcan be driven active accordingto normal JTAG specifications.
  Connection Diagram  Connection Diagram  Connection Diagram



Specifications

Storage Temperature ........................................................65  to +150
Case Temperature Under Bias ...........................................65 to +110
Supply Voltage with respect to VSS...................................0.5 V to + 4.6 V
Voltage on VCC5 with respect to VSS ...............................0.5 V to + 6.5 V
Voltage on Other Pins with respect to Vss ..............0.5 V to VCC5 + 0.5 V
Notice: Thisdocument contains information on products inthe samplingandinitial production phases of development.It is valid for thedevicesindicatedin the revisionhistory. The specificationswithin thisdatasheet are subject tochange without notice. Verify with your local Intel salesoffice that you have thelatest data sheet before finalizinga design.
Warning: Stressingthe device beyondthe "Absolute Maximum Ratings" maycause permanent damage. These arestressratings only. Operationbeyond the"OperatingConditions" is not recommended andextended exposurebeyondthe "OperatingConditions" may affect device reliability.




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