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Part Number: A6810SA-T

 

MFG: ALLEGRO

 

D/C: 08+

Description: The A6810 devices combine 10-bit CMOS shift registers, ac com - pa ny ing data latches and control cir...


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A6810SA-T General Description


The A6810 devices combine 10-bit CMOS shift registers, ac com - pa ny ing data latches and control cir cuit ry with bipolar sourcing out puts and pnp active pull downs. De signed pri mar ily to drive vacuum-fl u o - res cent displays, the 60 V and -40 mA output ratings also allow these devices to be used in many other peripheral power driver ap pli ca tions. The A6810 feature an increased data input rate (com pared with the older UCN/UCQ5810-F) and a con trolled output slew rate.

The CMOS shift register and latches allow direct interfacing with microprocessor-based systems. With a 3.3 V or 5 V logic supply, serialdata input rates of at least 10 MHz .

A CMOS serial data output permits cascade con nec tions in ap pli - ca tions re quir ing additional drive lines. Similar devices are available as the A6812 (20 bits) and A6818 (32 bits).

The A6810 output source drivers are npn Dar ling tons, capable of sourcing up to 40 mA. The controlled output slew rate reduces elec tro - mag net ic noise, which is an important consideration in systems that include telecommunications and/or microprocessors and to meet government emissions regulations. For inter-digit blanking, all output drivers can be dis abled and all sink drivers turned on with a BLANK ING input high. The pnp active pull-downs will sink at least 2.5 mA.

The A6810 are available in three temperature ranges for op ti mum per for mance in commercial (suffi x S-), industrial (suffi x E-), or automtoive (suffi x K) ap pli ca tions. They are provided in two package styles for through-hole DIP (suffi x -A) or minimum-area surface-mount SOIC (suffi x -LW). Copper lead frames, low logic-power dis si pa tion, and low output-saturation voltages allow all devices to source 25 mA from all outputs continuously over the max i mum operating tem pera ture range.

The lead (Pb) free versions are provided with 100% matte tin leadframe plating.

A6810SA-T Maximum Ratings

Logic Supply Voltage, VDD ...................... 7.0 V
Driver Supply Voltage, VBB ...................... 60 V
Continuous Output Current Range,
IOUT ................................... -40 mA to +15 mA
Input Voltage Range,
VIN ................................ -0.3 V to VDD + 0.3 V
Package Power Dissipation,
PD .................................................. See Graph
Operating Temperature Range, TA
(Suffi x 'E') ................... -40°C to +85°C
(Suffi x 'K') ................. -40°C to +125°C
(Suffi x 'S') ................... -20°C to +85°C
Storage Temperature Range,
TS ..................................... -55°C to +125°C
Caution: These CMOS devices have input static protection (Class 2) but are still susceptible to damage if exposed to extremely high static electrical charges.

A6810SA-T Features

Controlled Output Slew Rate
High-Speed Data Storage
60 V Minimum Output Breakdown
High Data Input Rate
PNP Active Pull-Downs
Low Output-Saturation Voltages
Low-Power CMOS Logic and Latches
Improved Replacements for TL4810, UCN5810, and UCQ5810

A6810SA-T Connection Diagram

A6810SA-T  Connection Diagram

A6810SA-T datasheet

A6810SA-T
PDF/DataSheet Download

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