A6812

The A6812 devices combine a 20-bit CMOS shift register, ac com - pa ny ing data latches and control cir cuit ry with bipolar sourcing out puts and pnp active pull downs. De signed pri mar ily to drive vacuum-fl u o - res cent displays, the 60 V and -40 mA output ratings also allow these devices to be used in many other peripheral power driver applications. The A6812 features an increased data input rate (com pared with the older UCN/UCQ5812-F) and a controlled output slew rate.

The CMOS shift register and latches allow direct interfacing with mi cro pro ces sor-based systems. With a 3.3 V or 5 V logic supply, they will operate to at least 10 MHz.

A CMOS serial data output permits cascade con nec tions in ap pli - ca tions re quir ing additional drive lines. Similar devices are avail able as the A6810 (10 bits) and A6818 (32 bits).

The A6812 output source drivers are npn Dar ling tons, capable of sourcing up to 40 mA. The controlled output slew rate reduces elec tro - mag net ic noise, which is an important consideration in systems that include telecommunications and/or microprocessors and to meet government emis sions regulations. For inter-digit blanking, all output drivers can be dis abled and all sink drivers turned on with a BLANK ING input high. The pnp active pull-downs will sink at least 2.5 mA.

Three temperature ranges are available for optimum performance in commercial (suffi x S-), industrial (suffi x E-), or automotive (suffi x K-) ap pli ca tions. Pack age styles are provided for surface-mount SOIC (suffi x -LW), or minimum-area surface-mount PLCC (suffi x -EP).

Copper lead frames, low logic-power dis si pa tion, and low output-saturation voltages allow these drivers to source 25 mA from all outputs continuously to more than +43°C (suffi x -LW) or +61°C (suffi x -EP). Each package is available in a lead (Pb) free version, with 100% matte tin leadframe plating.