MFG:N/A Package Cooled:QFP D/C:08+
MFG: N/A
Package Cooled: QFP
D/C: 08+
Description: The ACS8520 is a highly integrated, single-chip solution for the Synchronous Equipment Timing Source (...
The ACS8520 is a highly integrated, single-chip solution for the Synchronous Equipment Timing Source (SETS) function in a SONET or SDH Network Element. The device generates SONET or SDH Equipment Clocks (SEC) and Frame Synchronization clocks. The ACS8520 is fully compliant with the required international specifications and standards.
The device supports Free-run, Locked and Holdover modes. It also supports all three types of reference clock source: recovered line clock, PDH network, and node synchronization. The ACS8520 generates independent SEC and BITS/SSU clocks, an 8 kHz Frame Synchronization clock and a 2 kHz Multi-Frame Synchronization clock.
Two ACS8520 devices can be used together in a Master/Slave configuration mode allowing system protection against a single ACS8520 failure.A microprocessor port is incorporated, providing access to the configuration and status registers for device setup and monitoring. The ACS8520 supports IEEE 1149.1[5] JTAG boundary scan.
The user can choose between OCXO or TCXO to define the Stratum and/or Holdover performance required.
Important Note: The Absolute Maximum Ratings, Table 32, are stress ratings only, and functional operation of the device at conditions other than those indicated in the Operating Conditions sections of this specification are not implied. Exposure to the absolute maximum ratings for an extended period may reduce the reliability or useful lifetime
of the product.
|
Parameter |
Symbol |
Min |
Max |
Units |
| Supply Voltage VDDa, VDDb, VDDc, VDDd, VD1+, VD2+, VD3+, VA1+, VA2+, VA3+, VAMI+, VDD_DIFFa, VDD_DIFFb |
VDD |
-0.5 |
3.6 |
V |
| Input Voltage (non-supply pins) |
VIN |
- |
5.5 |
V |
| Output Voltage (non-supply pins) |
VOUT |
- |
5.5 |
V |
| Ambient Operating Temperature Range |
TA |
-40 |
+85 |
|
| Storage Temperature |
TSTOR |
-50 |
+150 |
`Suitable for Stratum 3, 4E, 4 and SONET Minimum Clock (SMC) or SONET/SDH Equipment Clock (SEC) applications
`Meets Telcordia 1244-CORE[19] Stratum 3 and GR-253[17], and ITU-T G.813[11] Options and specifications
`Accepts 14 individual input reference clocks, all with robust input clock source quality monitoring.
`Simultaneously generates nine output clocks, plus two Sync pulse outputs
`Absolute Holdover accuracy better than 3 x 10-10 (manual), 7.5 x 10-14 (instantaneous); Holdover stability defined by choice of external XO
`Programmable PLL bandwidth, for wander and jitter tracking/attenuation, 0.1 Hz to 70 Hz in 10 steps
`Automatic hit-less source switchover on loss of input
`Microprocessor interface - Intel, Motorola, Serial,Multiplexed, or boot from EPROM
`Output phase adjustment in 6 ps steps up to ±200 ns
`IEEE 1149.1 JTAG Boundary Scan
`Single 3.3 V operation. 5 V tolerant
`Available in LQFP 100 package
ACS8520
PDF/DataSheet Download
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