Features: AD5346: octal 8-bit DACAD5347: octal 10-bit DACAD5348: octal 12-bit DACLow power operation: 1.4 mA (max) @ 3.6 VPower-down to 120 nA @ 3 V, 400 nA @ 5 VGuaranteed monotonic by design over all codesRail-to-rail output range: 0 V to VREF or 0 V to 2 * VREFPower-on reset to 0 VSimultaneous ...
AD5347: Features: AD5346: octal 8-bit DACAD5347: octal 10-bit DACAD5348: octal 12-bit DACLow power operation: 1.4 mA (max) @ 3.6 VPower-down to 120 nA @ 3 V, 400 nA @ 5 VGuaranteed monotonic by design over ...
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Resolution (Bits) | 10bit |
DAC Update Rate | 143kSPS |
DAC Settling Time | 7s |
# DAC Outputs | 8 |
DAC Type | Voltage Out |
DAC Input Format | Par |
Output FSR | (Uni 2Vref),(Uni Vref) |
Ref Int/Ext | Ext |
Supply Vnom | Single(+2.7),Single(+3),Single(+3.3),Single(+5) |
Pwr Diss | 8.3mW |
Package | CSP,SOP |
The AD5346/AD5347/AD53481 are octal 8-, 10-, and 12-bit DACs, operating from a 2.5 V to 5.5 V supply. These devices incorporate an on-chip output buffer that can drive the output to both supply rails, and also allow a choice of buffered or unbuffered reference input.
The AD5346/AD5347/AD5348 have a parallel interface.CS selects the device and data is loaded into the input registers on the rising edge of WR. A readback feature allows the internal DAC registers to be read back through the digital port. The GAIN pin on these devices allows the output range to be set at 0 V to VREF or 0 V to 2 × VREF.
Input data to the DACs is double-buffered, allowing simultaneous update of multiple DACs in a system using theLDAC pin.
An asynchronousCLR input is also provided, which resets the contents of the input register and the DAC register to all zeros. These devices also incorporate a power-on reset circuit that ensures that the DAC output powers on to 0 V and remains there until valid data is written to the device.
All three parts are pin compatible, which allows users to select the amount of resolution appropriate for their application without redesigning their circuit board.