AD7538

V_DD (Pin 23) to DGND . . . . . . . . . . . . . . . . . . .0.3 V, +17 V
V_SS (Pin 24) to AGND . . . . . . . . . . . . . . . . . . . 15 V, +0.3 V
V_REF (Pin 1) to AGND . . . . . . . . . . . . . . . . . . . . . . . . . ±25 V
V_RFB (Pin 2) to AGND . . . . . . . . . . . . . . . . . . . . . . . . . ±25 V
Digital Input Voltage (Pins 622)
to DGND . . . . . . . . . . . . . . . . . . . . . . .. 0.3 V, V_DD +0.3 V
VPIN3 to DGND . . . . . . . . . . . . . . . . . . .0.3 V, V_DD +0.3 V
AGND to DGND . . . . . . . . . . . . . . . . . . 0.3 V, V_DD +0.3 V
Power Dissipation (Any Package)
To +75°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000 mW
Derates Above +75°C . . . . . . . . . . . . . . . . . . . 10 mW/°C
Operating Temperature Range
Commercial (J, K Versions) . . . . . . . . . . . . . 0°C to +70°C
Industrial (A, B Versions) . . . . . . . . . . . .25°C to +85°C
Extended (S, T Versions) . . . . . . . . . . .55°C to +125°C
Storage Temperature . . . . . . . . . . . . . 65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . +300°C
*Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

The AD7538 is a 14-bit monolithic CMOS D/A converter which uses laser trimmed thin-film resistors to achieve excellent linearity.

The DAC is loaded by a single 14-bit wide word using standard Chip Select and Memory Write Logic. Double buffering, which is optional using LDAC, allows simultaneous update in a system containing multiple AD7538s.

A novel low leakage configuration (U.S. Patent No. 4,590,456) enables the AD7538 to exhibit excellent output leakage current characteristics over the specified temperature range.

The AD7538 is manufactured using the Linear Compatible CMOS (LC2MOS) process. It is speed compatible with most microprocessors and accepts TTL or CMOS logic level inputs.