AD9236

Features:

Single 3 V supply operation (2.7 V to 3.6 V)
SNR = 70.4 dBc to Nyquist
SFDR = 87.8 dBc to Nyquist
Low power: 366 mW
Differential input with 500 MHz bandwidth
On-chip reference and sample-and-hold
DNL = ± 0.4 LSB
Flexible analog input: 1 V p-p to 2 V p-p range
Offset binary or twos complement data format
Clock duty cycle stabilizer




Application

High end medical imaging equipment
IF sampling in communications receivers:WCDMA, CDMA-One, CDMA-2000
Battery-powered instruments
Hand-held scopemeters
Low cost digital oscilloscopes
DTV subsystems




Pinout








Specifications



AVDD AGND 0.3 +3.9 V
DRVDD DGND 0.3 +3.9 V
AGND DGND 0.3 +0.3V
AVDD DRVDD 3.9 +3.9V




Description

The AD9236 is a monolithic, single 3 V supply, 12-bit, 80 MSPS analog-to-digital converter featuring a high performance sample-and-hold amplifier (SHA) and voltage reference. The AD9236 uses a multistage differential pipelined architecture with output error correction logic to provide 12-bit accuracy at 80 MSPS and guarantee no missing codes over the full operating temperature range.

The wide bandwidth, truly differential SHA allows a variety of user-selectable input ranges and common modes, including single-ended applications. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate. Combined with power and cost savings over previously available analog-to-digital converters, the AD9236 is suitable for applications in communications, imaging, and medical ultrasound. A single-ended clock input is used to control all internal conversion cycles. A duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.