AD9882A

The AD9882A offers designers the flexibility of an analog inter-face and a digital visual interface (DVI) receiver integrated on a single chip. Also included is support for high bandwidth digital content protection (HDCP).

Analog Interface
The AD9882A is a complete, 8-bit, 140 MSPS monolithic analog interface optimized for capturing RGB graphics signals from personal computers and workstations. Its 140 MSPS encode rate capability and full power analog bandwidth of 300 MHz sup-ports resolutions up to SXGA (1280 * 1024 at 75 Hz).

The analog interface includes a 140 MHz triple ADC with internal 1.25 V reference, a phase-locked loop (PLL), program-mable gain, offset, and clamp control. The user provides only a 3.3 V power supply, analog input, and Hsync. Three-state CMOS outputs can be powered from 2.2 V to 3.3 V.

The AD9882A's on-chip PLL generates a pixel clock from Hsync. Pixel clock output frequencies range from 12 MHz to 140 MHz. PLL clock jitter is typically 500 ps p-p at 140 MSPS.

The AD9882A also offers full sync processing for composite sync and sync-on-green (SOG) applications.

Digital Interface
The AD9882A contains a DVI 1.0 compatible receiver and supports display resolutions up to SXGA (1280 * 1024 at 60 Hz). The receiver features an intrapair skew tolerance of up to one full clock cycle.

With the inclusion of HDCP, displays can now receive encrypted video content. The AD9882A allows for authentica-tion of a video receiver, decryption of encoded data at the receiver, and renewability of that authentication during trans-mission, as specified by the HDCP v1.0 protocol. It also has high tolerance of noncompliant HDCP sources.

Fabricated in an advanced CMOS process, the AD9882A is provided in a space-saving, 100-lead LQFP surface-mount plastic package and is specified over the 0°C to 70°C temperature range. It is available in a Pb-free package.