Features: Analog interface 170 MSPS maximum conversion rate Programmable analog bandwidth 0.5 V to 1.0 V analog input range 500 ps p-p PLL clock jitter at 170 MSPS 3.3 V power supply Full sync processingMidscale clamping 4:2:2 output format mode Digital interface DVI 1.0-compatible interface 170 ...
AD9887A: Features: Analog interface 170 MSPS maximum conversion rate Programmable analog bandwidth 0.5 V to 1.0 V analog input range 500 ps p-p PLL clock jitter at 170 MSPS 3.3 V power supply Full sync proc...
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Parameter | Rating |
VD VDD Analog Inputs VREFIN Digital Inputs Digital Output Current Operating Temperature Storage Temperature Maximum Junction Temperature Maximum Case Temperature |
3.6 V 3.6 V VD to 0.0 V VD to 0.0 V 5 V to 0.0 V 20 mA −25°C to +85°C −65°C to +150°C 150°C 150°C |
The AD9887A offers an analog interface receiver and a digital visual interface (DVI) receiver integrated on a single chip, supports high bandwidth digital content protection (HDCP), and is software and pin-to-pin compatible with the AD9887.
Analog Interface
The complete 8-bit, 170 MSPS, monolithic, analog interface is optimized for capturing RGB graphics signals from personal computers and workstations. Its 170 MSPS encode rate capability and full-power analog bandwidth of 330 MHz support resolutions of up to 1600 × 1200 (UXGA) at 60 Hz. The interface includes a 170 MHz triple ADC with internal 1.25 V reference; a phaselocked loop (PLL); and programmable gain, offset, and clamp controls. The user provides only a 3.3 V power supply, analog input, and Hsync. Three-state CMOS outputs can be powered from 2.5 V to 3.3 V. The analog interface also offers full sync processing for composite sync and sync-on-green (SOG) applications. The AD9887A on-chip PLL generates a pixel clock from Hsync with output frequencies ranging from 12 MHz to 170 MHz. PLL clock jitter is typically 500 ps p-p at 170 MSPS.
Digital Interface
The AD9887A contains a DVI 1.0-compatible receiver and supports resolutions of up to 1600 × 1200 (UXGA) at 60 Hz. The receiver operates with true color (24-bit) panels in one or two pixel(s) per clock mode and features an intrapair skew tolerance of up to one full clock cycle. With the inclusion of HDCP, displays can receive encrypted video content. The AD9887A allows for authentication of a video receiver, decryption of encoded data at the receiver, and renewability of authentication during transmission as specified by the HDCP v1.0 protocol. Fabricated in an advanced CMOS process, the AD9887A is provided in a 160-lead MQFP surface-mount plastic package and is specified over the 0°C to 70°C temperature range. The AD9887A is also available in a Pb-free package.