ADC08500

PinoutSpecificationsResolution8 bitsChannels1 ChannelsSNR47.5 dBSFDR56 dBENOB7.5 bitsMax Sample Rate500 MSPSMin Sample Rate200 MSPSPower Dissipation0.8 WattPowerWise Rating 18.84 pJ/convDNL (+/-)0.15 LSBINL (+/-)0.3 LSBSINAD47 dBTHD dB-56 dBMin Supply Voltage1.8 VoltMax Supply Voltage2 VoltNominal...

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ADC08500 Picture
SeekIC No. : 004274009 Detail

ADC08500: PinoutSpecificationsResolution8 bitsChannels1 ChannelsSNR47.5 dBSFDR56 dBENOB7.5 bitsMax Sample Rate500 MSPSMin Sample Rate200 MSPSPower Dissipation0.8 WattPowerWise Rating 18.84 pJ/convDNL (+/-)0.1...

floor Price/Ceiling Price

Part Number:
ADC08500
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/28

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Product Details

Description



Pinout




Specifications

Resolution8 bits
Channels1 Channels
SNR47.5 dB
SFDR56 dB
ENOB7.5 bits
Max Sample Rate500 MSPS
Min Sample Rate200 MSPS
Power Dissipation0.8 Watt
PowerWise Rating 18.84 pJ/conv
DNL (+/-)0.15 LSB
INL (+/-)0.3 LSB
SINAD47 dB
THD dB-56 dB
Min Supply Voltage1.8 Volt
Max Supply Voltage2 Volt
Nominal Vin0.7 Vpp
Temperature Min-40 deg C
Temperature Max85 deg C
Data Converter TypeADC
Automotive Selection GuideNo
PowerWiseYes
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Description

The ADC08500 is a low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 500 MSPS. Consuming a typical 0.8 Watts at 500 MSPS from a single 1.9 Volt supply, this device is guaranteed to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the self-calibration scheme enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.5 ENOB with a 250 MHz input signal and a 500 MHz sample rate while providing a 10 -18 B.E.R. Output formatting is offset binary and the LVDS digital outputs are compatible with IEEE 1596.3-1996, with the exception of an adjustable common mode voltage between 0.8V and 1.2V.

The converter has a 1:2 demultiplexer that feeds two LVDS buses and reduces the output data rate on each bus to half the sampling rate.

The converter typically consumes less than 3.5 mW in the Power Down Mode and is available in a 128-lead, thermally enhanced exposed pad LQFP and operates over the Industrial (-40°C TA +85°C) temperature range.

Reliability Metrics


Part Number Process EFR Reject EFR Sample Size PPM LTA Rejects LTA Device Hours FITS MTTF (Hours)
ADC08500CIYB CMOS9 1 6382 157 0 923000 4 261903770

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.





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