ADC102S101

The ADC102S101 is a low-power, two-channel CMOS 10-bit analog-to-digital converter with a high-speed serial interface. Unlike the conventional practice of specifying performance at a single sample rate only, the ADC102S101 is fully specified over a sample rate range of 500 ksps to 1 Msps. The converter is based on a successive-approximation register architecture with an internal track-and-hold circuit. It can be configured to accept one or two input signals at inputs IN1 and IN2.

The output serial data is straight binary, and is compatible with several standards, such as SPI™, QSPI™, MICROWIRE, and many common DSP serial interfaces.

The ADC102S101 operates with a single supply that can range from +2.7V to +5.25V. Normal power consumption using a +3V or +5V supply is 3.9 mW and 11.4 mW, respectively. The power-down feature reduces the power consumption to just 0.12 µW using a +3.6V supply, or 0.47 µW using a +5.5V supply.

The ADC102S101 is packaged in an 8-lead MSOP package. Operation over the industrial temperature range of −40°C to +85°C is guaranteed.

Reliability Metrics

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Part Number	Process	EFR Reject	EFR Sample Size	PPM	LTA Rejects	LTA Device Hours	FITS	MTTF (Hours)
ADC102S101CIMM	CMOS7	0	16561	0	0	954000	4	270700104
ADC102S101CIMMX	CMOS7	0	16561	0	0	954000	4	270700104

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.

Design Tools

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Title	Size in Kbytes	Date
Eval Board Users' Guide	262 Kbytes	28-Mar-2007	View Online	Download

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