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Part Number: ADC10D1000

 

 

 

 

Description: The ADC10D1000 is the latest advance in National's Ultra-High-Speed ADC family. This low-power, high-performanc...


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ADC10D1000 General Description


The ADC10D1000 is the latest advance in National's Ultra-High-Speed ADC family. This low-power, high-performance CMOS analog-to-digital converter digitizes signals at 10-bit resolution for dual channels at sampling rates of up to 1.0 GSPS (Non-DES Mode) or for a single channel up to 2.0 GSPS (DES Mode). The ADC10D1000 achieves excellent accuracy and dynamic performance while dissipating less than 2.8 Watts. The product is packaged in a leaded or lead-free 292-ball thermally enhanced BGA package which does not require a heat sink over the rated industrial temperature range of -40°C to +85°C.

The ADC10D1000 builds upon the features, architecture and functionality of the 8-bit GHz family of ADCs. An expanded feature set includes AutoSync for multi-chip synchronization, 15-bit programmable gain and 12-bit plus sign programmable offset adjustment for each channel. The improved internal track-and-hold amplifier and the extended self-calibration scheme enable a very flat response of all dynamic parameters beyond Nyquist, producing 9.0 Effective Number of Bits (ENOB) with a 498 MHz input signal and a 1.0 GHz sample rate while providing a 10 -18 Code Error Rate (CER) Dissipating a typical 2.77 Watts in Non-Demultiplex Mode at 1.0 GSPS from a single 1.9 Volt supply, this device is guaranteed to have no missing codes over the full operating temperature range.

Each channel has its own independent DDR Data Clock, DCLKI and DCLKQ, which are in phase when both channels are powered up, so that only one Data Clock could be used to capture all data, which is sent out at the same rate as the input sample clock. If the 1:2 Demux Mode is selected, a second 10-bit LVDS bus becomes active for each channel, such that the output data rate is sent out two times slower to relax data-capture timing requirements. The part can also be used as a single 2.0 GSPS ADC to sample one of the I or Q inputs. The output formatting can be programmed to be offset binary or two's complement and the Low Voltage Differential Signaling (LVDS) digital outputs are compatible with IEEE 1596.3-1996, with the exception of an adjustable common mode voltage between 0.8V and 1.2V to allow for power reduction for well-controlled back planes.

Reliability Metrics


Part NumberProcessEFR RejectEFR Sample SizePPMLTA RejectsLTA Device HoursFITSMTTF (Hours)
ADC10D1000CIUTCMOS91638215709230004261903770

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.


ADC10D1000 Maximum Ratings

Resolution10 bits
Channels2 Channels
SNR57 dB
SFDR66 dB
ENOB9.1 bits
Max Sample Rate1000 MSPS
Min Sample Rate200 MSPS
Power Dissipation2.77 Watt
PowerWise Rating 12.52 pJ/conv
DNL (+/-)0.25 LSB
INL (+/-)0.65 LSB
SINAD56.5 dB
THD dB-66 dB
Min Supply Voltage1.8 Volt
Max Supply Voltage2.0 Volt
Nominal Vin.79 Vpp
Temperature Min-40 deg C
Temperature Max85 deg C
Data Converter TypeADC
AEC Q-100 Automotive Grade0
Automotive Selection GuideYes
PowerWiseYes
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ADC10D1000 Connection Diagram

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ADC10D1000 datasheet

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