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MFG:ADI D/C:09
Part Number: ADF4001
MFG: ADI
D/C: 09
Description: The ADF4001 clock generator can be used to implement clock sources for PLLs that require very low noise, stable referen...
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ADF4001
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DataSheet
General Description
ADF4001 General Description
The ADF4001 clock generator can be used to implement clock sources for PLLs that require very low noise, stable reference signals. It consists of a low-noise digital PFD (Phase Frequency Detector), a precision charge pump, a programmable reference divider, and a programmable 13-bit N counter. In addition, the 14-bit reference counter (R Counter) allows selectable REFIN frequencies at the PFD input. A complete PLL (Phase-Locked Loop) can be implemented if the synthesizer is used with an external loop filter and VCO (Voltage Controlled Oscillator) or VCXO (Voltage Controlled Crystal Oscillator). The N min value of 1 allows flexibility in clock generation.
ADF4001 Maximum Ratings
AVDD to GND3 . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +7 V
AVDD to DVDD . . . . . . . . . . . . . . . . . . . . . . . . 0 V to + 0.3 V
VP to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +7 V
VP to AVDD . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +5.5 V
Digital I/O Voltage to GND . . . . . . . . . 0.3 V to VDD + 0.3 V
Analog I/O Voltage to GND . . . . . . . . . . 0.3 V to VP + 0.3 V
REFIN, RFINA, RFINB to GND . . . . . . . 0.3 V to VDD + 0.3 V
RFINA to RFINB . . . . . . . . . . . . . . . . . . . . . . . . . . . .±320 mV
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . 40°C to +85°C
Storage Temperature Range . . . . . . . . . . .65°C to +150°C
Maximum Junction Temperature . . . . . . . . . . . . . . . . . 150°C
AVDD to DVDD . . . . . . . . . . . . . . . . . . . . . . . . 0 V to + 0.3 V
VP to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +7 V
VP to AVDD . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +5.5 V
Digital I/O Voltage to GND . . . . . . . . . 0.3 V to VDD + 0.3 V
Analog I/O Voltage to GND . . . . . . . . . . 0.3 V to VP + 0.3 V
REFIN, RFINA, RFINB to GND . . . . . . . 0.3 V to VDD + 0.3 V
RFINA to RFINB . . . . . . . . . . . . . . . . . . . . . . . . . . . .±320 mV
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . 40°C to +85°C
Storage Temperature Range . . . . . . . . . . .65°C to +150°C
Maximum Junction Temperature . . . . . . . . . . . . . . . . . 150°C
ADF4001 Features
200 MHz Bandwidth
2.7 V to 5.5 V Power Supply
Separate Charge Pump Supply (VP) Allows Extended Tuning Voltage in 5 V Systems
Programmable Charge Pump Currents
3-Wire Serial Interface
Hardware and Software Power-Down Mode
Analog and Digital Lock Detect
Hardware-Compatible to the ADF4110/ADF4111/ADF4112/ADF4113
Typical Operating Current 4.5 mA
Ultralow Phase Noise
16-Lead TSSOP
20-Lead Chip Scale Package
2.7 V to 5.5 V Power Supply
Separate Charge Pump Supply (VP) Allows Extended Tuning Voltage in 5 V Systems
Programmable Charge Pump Currents
3-Wire Serial Interface
Hardware and Software Power-Down Mode
Analog and Digital Lock Detect
Hardware-Compatible to the ADF4110/ADF4111/ADF4112/ADF4113
Typical Operating Current 4.5 mA
Ultralow Phase Noise
16-Lead TSSOP
20-Lead Chip Scale Package
ADF4001 Typical Application
Clock Generation
Low Frequency PLLs
Low Jitter Clock Source
Clock Smoothing
Frequency Translation
SONET, ATM, ADM, DSLAM, SDM
Low Frequency PLLs
Low Jitter Clock Source
Clock Smoothing
Frequency Translation
SONET, ATM, ADM, DSLAM, SDM
ADF4001 Connection Diagram
ADF4001
PDF/DataSheet Download
- Datasheet: ADF4001
- File Size: 195241 KB
- Manufacturer: AD [Analog Devices]
- Click here to Download
- ·ADF4001BCP
- AD [Analog Devices]
- 200 MHz Clock Generator PLL
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- ·ADF4001BRU
- AD [Analog Devices]
- 200 MHz Clock Generator PLL
- 195241 KB
- ·ADF4002
- 454156 KB
- ·ADF4007
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- High Frequency Divider/PLL Synthesizer
- 400216 KB
- ·ADF4007BCP
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- 400216 KB
- ·ADF4007BCP-REEL
- AD [Analog Devices]
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- 400216 KB
- ·ADF4007BCP-REEL7
- AD [Analog Devices]
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- 400216 KB
- ·ADF4106
- AD [Analog Devices]
- PLL Frequency Synthesizer
- 234312 KB
ADF4001 Relative Products
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CONN D-SUB 37POS FEMALE VERT
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A-DF37PP-F-R
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A-DF37LL-F-R
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