ADSP-2173BST-80

The ADSP-2173BST-80 combines the ADSP-2100 base architecture (three computational units, data address generators, and a program sequencer) with two serial ports, a host interface port, a programmable timer, extensive interrupt capabilities, and onchip program and data memory.

The features of ADSP-2173BST-80 are: (1)30 ns Instruction Cycle Time (33 MIPS) from 16.67 MHz Crystal at 5.0 V; (2)50 ns Instruction Cycle Time (20 MIPS) from 10 MHz Crystal at 3.3 V; (3)ADSP-2100 Family Code & Function Compatible with New Instruction Set Enhancements for Bit Manipulation Instructions, Multiplication Instructions, Biased Rounding, and Global Interrupt Masking; (4)Bus Grant Hang Logic; (5)8- or 16-Bit Parallel Host Interface Port; (6)300 mW Typical Power Dissipation at 5.0 V at 30 ns; (7)70 mW Typical Power Dissipation at 3.3 V at 50 ns; (8)Powerdown Mode Featuring Less than 0.55 mW; (9)Dual Purpose Program Memory for Both Instruction and Data Storage.

The following is about the maximum ratings of ADSP-2173BST-80: (1)Supply Voltage: 0.3 V to +7 V; (2)Input Voltage: 0.3 V to VDD + 0.3 V; (3)Output Voltage Swing: 0.3 V to VDD + 0.3 V; (4)Operating Temperature Range (Ambient): 40°C to +85°C; (5)Storage Temperature Range: 65°C to +150°C; (6)Lead Temperature (5 sec) TQFP: +280°C; (7)Lead Temperature (5 sec) PQFP: +280°C.