ADSP-21mod980N

The ADSP-21mod980N is a multi-port Internet gateway processor optimized for implementation of a complete V.34/V.90 digital modem. All datapump and controller unctions can be implemented on a single device, offering he lowest power consumption and highest possible modem port density.

The ADSP-21mod980N combines the ADSP-2100 Family base architecture (three computational units, data address generators, and a program sequencer) with two serial ports, a 16-bit internal DMA port, a byte DMA port, a program-mable timer, Flag I/O, extensive interrupt capabilities, and on-chip program and data memory. The ADSP-21mod980N integrates 16 Mbits of on-chip memory, configured as 384 Kwords (24-bit) of program RAM, and 448 Kwords (16-bit) of data RAM. Power-down circuitry is also provided to reduce the average and standby power consumption of equipment which in turn reduces equipment cooling requirements.

The ADSP-21mod980N s available in a 35 mm x 35 mm, 352-lead PBGA package.Fabricated in a high-speed, low-power, CMOS process, the ADSP-21mod980N operates with a 12.5 ns instruction cycle time. Every instruction can execute in a single proces-sor cycle. The ADSP-21mod980N's flexible architecture and com-prehensive instruction set allow the processor to perform multiple operations in parallel. In one processor cycle, the ADSP-21mod980N can:
Generate the next program address
Fetch the next instruction
Perform one or two data moves
Update one or two data address pointers
Perform a computational operation
This takes place while the processor continues to:
Receive and transmit data through the two serial ports
Receive and/or transmit data through the internal DMA port
Receive and/or transmit data through the byte DMA port
Decrement timer