ADSP-21msp58

Features: ·38 ns Instruction Cycle Time (26 MIPS) from 13.00 MHz Crystal·ADSP-2100 Family Code and Function Compatible with·New Instruction Set Enhanced for Bit Manipulation Instructions, Multiplication Instructions, Biased Rounding, and Global Interrupt Masking·2K 3 24 Words of On-Chip Program Me...

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ADSP-21msp58 Picture
SeekIC No. : 004277684 Detail

ADSP-21msp58: Features: ·38 ns Instruction Cycle Time (26 MIPS) from 13.00 MHz Crystal·ADSP-2100 Family Code and Function Compatible with·New Instruction Set Enhanced for Bit Manipulation Instructions, Multiplica...

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Part Number:
ADSP-21msp58
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/4

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Product Details

Description



Features:

·38 ns Instruction Cycle Time (26 MIPS) from 13.00 MHz Crystal
·ADSP-2100 Family Code and Function Compatible with
·New Instruction Set Enhanced for Bit Manipulation Instructions, Multiplication Instructions, Biased Rounding, and Global Interrupt Masking
·2K 3 24 Words of On-Chip Program Memory RAM
·2K 3 16 Words of On-Chip Data Memory RAM
·4K 3 24 Words of On-Chip Program Memory ROM (ADSP-21msp59 Only)
·8-Bit Parallel Host Interface Port
·Analog Interface Provides:
   16-Bit Sigma-Delta ADC and DAC
   Programmable Gain Stages
   On-Chip Anti-Aliasing & Anti-Imaging Filters
   8 kHz Sampling Frequency
   65 dB ADC, SNR and THD
   72 dB DAC, SNR and THD
·425 mW Typical Power Dissipation @ 5.0 V @ 38 ns
·<1 mW Powerdown Mode with 100 Cycle Recovery
·Dual Purpose Program Memory for Both Instruction and Data Storage
·Independent ALU, Multiplier/Accumulator, and Barrel
·Shifter Computational Units
·Two Independent Data Address Generators
·Powerful Program Sequencer Provides:
   Zero Overhead Looping
   Conditional Instruction Execution
·Two Double-Buffered Serial Ports with Companding
·Hardware, One Serial Port (SPORT0) has Automatic Data Buffering
·Programmable 16-Bit Interval Timer with Prescaler
·Programmable Wait State Generation
·Automatic Booting of Internal Program Memory from
·Byte-Wide External Memory, e.g., EPROM, or Through Host Interface Port
·Stand-Alone ROM Execution (ADSP-21msp59 Only)
   Single-Cycle Instruction Execution
   Single-Cycle Context Switch
·Multifunction Instructions
·Three Edge- or Level-Sensitive External Interrupts
·Low Power Dissipation in Standby Mode
·100-Lead TQFP



Pinout

  Connection Diagram


Specifications

Supply Voltage ....................0.3 V to +7 V
Input Voltage   ................ 0.3 V to VDD + 0.3 V
Output Voltage Swing.............0.3 V to VDD + 0.3 V
Operating Temperature Range (Ambient)   ....40°C to +85°C
Storage Temperature Range  ..........65°C to +150°C
Lead Temperature (5 sec)  ................. +280°C

*Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.



Description

The  ADSP-21msp58/59  Mixed-Signal Processors (MSProcessor® DSPs) are fully integrated, single-chip DSPs complete with a high performance analog front end. The ADSP-21msp58/59 Family is optimized for voice band applications such as Speech Compression, Speech Processing, Speech Recognition, Text-to Speech, and Speech-to-Text conversion.

The ADSP-21msp58/59 combines the ADSP-2100 base architecture (three computation units, data address generators, and program sequencer) with two serial ports, a host interface port, an analog front end, a programmable timer, extensive interrupt capability, and on-chip program and data memory.

The ADSP-21msp58 provides 2K words (24-bit) of program RAM and 2K words (16-bit) of data memory. The ADSP- 21msp59 provides an additional 4K words (24-bit) of program ROM.It integrates a high performance analog codec based on a single chip, voice band codec, the AD28msp02. Powerdown circuitry is also provided to meet the low power needs of battery operated portable equipment. The product is available in a 100-pin TQFP package
(thin quad flat package).

In addition, the ADSP-21msp58/59 supports new instructions,
which include bit manipulationsbit set, bit clear, bit toggle,
bit testnew ALU constants, new multiplication instruction
(x squared), biased rounding, and global interrupt masking.




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