AM26LS32 General Description
Motorola4s Quad EIA422/3 Receiver features four independent receiver hains which comply with EIA Standards for the Electrical Characteristics of Balanced/Unbalanced Voltage Digital Interface Circuits. Receiver outputs are 74LS compatible, threestate structures which are forced to a high impedance state when Pin 4 is a Logic "0" and Pin 12 is a Logic "1." A PNP device buffers each output control pin to assure minimum loading for either Logic "1" or Logic "0" inputs. In addition, each receiver chain has internal hysteresis circuitry to improve noise margin and discourage output instability for slowly changing input waveforms.
AM26LS32 Features
• Four Independent Receiver Chains
• ThreeState Outputs
• High Impedance Output Control Inputs
(PIA Compatible)
• Internal Hysteresis 30 mV (Typical) @ Zero Volts Common Mode
• Fast Propagation Times 25 ns (Typical)
• TTL Compatible
• Single 5.0 V Supply Voltage
• FailSafe InputOutput Relationship. Output Always High When Inputs
Are Open, Terminated or Shorted
• 6.0 k Minimum Input Impedance
AM26LS32 Connection Diagram
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