AM28F256A-200JC General Description
AM28F256A-200JC Maximum Ratings
Storage Temperature . . . . . . . . . . . 65 to +150
Plastic Packages . . . . . . . . . . . . . . . 65 to +125
Ambient Temperature
with Power Applied. . . . . . . . . . . . . 55 to + 125
Voltage with Respect To Ground
All pins except A9 and VPP
(Note 1) . . . . . . . . . . . . . . . . . . . . . 2.0 V to +7.0 V
VCC
(Note 1). . . . . . . . . . . . . . . . . . . . . . 2.0 V to +7.0 V
A9 (Note 2). . . . . . . . . . . . . . . . . . .2.0 V to +14.0 V
VPP (Note 2). . . . . . . . . . . . . . . . . .2.0 V to +14.0 V
Output Short Circuit Current (Note 3) . . . . . 200 mA
AM28F256A-200JC Features
High performance
- Access times as fast as 70 ns
CMOS low power consumption
- 30 mA maximum active current
- 100 µA maximum standby current
- No data retention power consumption
Compatible with JEDEC-standard byte-wide32-Pin EPROM pinouts
- 32-pin PDIP
- 32-pin PLCC
- 32-pin TSOP
100,000 write/erase cycles minimum
nWrite and erase voltage 12.0 V ±5%
Latch-up protected to 100 mA from 1 V toVCC +1 V
Embedded Erase Electrical Bulk Chip-Erase
- 1.5 seconds typical chip-erase includingpre-programming
Embedded Program
- 14 µs typical byte-program including time-ou
- 0.5 second typical chip program
Command register architecture formicroprocessor/microcontroller compatiblewrite interface
On-chip address and data latches
Advanced CMOS flash memory technology
- Low cost single transistor memory cell
Embedded algorithms for completelyself-timed write/erase operations
AM28F256A-200JC Connection Diagram
AM28F256A-200JC datasheet
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