AS6WA25616

When CS is high, or UB and LB are high, the device enters standby mode: the AS6WA25616 is guaranteed not to exceed 72 W power consumption at 3.6V and 55 ns. The device also returns data when V_CC is reduced to 1.5V for even lower power consumption.

A write cycle is accomplished by asserting write enable (WE) and chip select (CS) low. and UB and/or LB low.Data on the input pins I/O1I/O16 is written on the rising edge of WE (write cycle 1) or CS (write cycle 2). To avoid bus contention, external devices should drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).

A read cycle is accomplished by asserting output enable (OE), chip select (CS), with write enable (WE) High. The chip drives I/O pins with the data word referenced by the input address. When either chip select or output enable is inactive, or write enable is active, or (UB) and (LB),output drivers stay in high-impedance mode.

These devices provide multiple center power and ground pins, and separate byte enable controls, allowing individual bytes to be written and read. LB controls the lower bits, I/O1I/O8, and UB controls the higher bits, I/O9I/O16.