AS7C3364PFS36A

The AS7C3364PFS32A and AS7C3364PFS36A are high-performance CMOS 2-Mbit synchronous Static Random Access Memory (SRAM) devices organized as 65,536 words × 32 or 36 bits, and incorporate a two-stage register-register pipeline for highest frequency on any given technology.

Timing for these devices is compatible with existing Pentium® synchronous cache specifications. This architecture is suited for ASIC, DSP (TMS320C6X), and PowerPC™*-based systems in computing, datacomm, instrumentation, and telecommunications systems.

Fast cycle times of 6/6.7/7.5/10 ns with clock access times (t_CD) of 3.5/3.8/4.0/5.0 ns enable 166, 150, 133 and 100 MHz bus frequencies.

Read cycles are initiated with ADSP (regardless of WE and ADSC) using the new external address clocked into the on-chip address register when ADSP is sampled low, the chip enables are sampled active, and the output buffer is enabled with OE. In a read operation, the data accessed by the current address registered in the address registers by the positive edge of CLK are carried to the data-out registers and driven on the output pins on the next positive edge of CLK. ADV is ignored on the clock edge that samples ADSP asserted, but is sampled on all subsequent clock edges. Address is incremented internally for the next access of the burst when ADV is sampled low and both address strobes are high. Burst mode is selectable with theLBOinput. With LBO unconnected or driven high, burst operations use an interleaved count sequence. WithLBOdriven low, the device uses a linear count sequence.

Read or write cycles may also be initiated with ADSC instead of ADSP. The differences between cycles initiated withADSCand ADSP are as follows:
• ADSP must be sampled high when ADSC is sampled low to initiate a cycle with ADSC.
•WE signals are sampled on the clock edge that samples ADSClow (and ADSP high).
•Master chip enable CE0 blocks ADSP, but not ADSC.

ASAS7C3364PFS32A and ASAS7C3364PFS36A family operates from a core 3.3V power supply. I/Os use a separate power supply that can operate at 2.5V or 3.3V. These devices are available in a 100-pin 14 × 20 mm TQFP package.

*PowerPC™ is a tradenark International Business Machines Corporation.