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Description: ASM5P23S09A is a versatile, 3.3V zero-delay buffer designed to distribute high-speed clocks with Sprea...


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ASM5P23S05A General Description


ASM5P23S09A is a versatile, 3.3V zero-delay buffer designed to distribute high-speed clocks with Spread Spectrum capability. It is available in a 16-pin package. The ASM5P23S05A is the eight-pin version of the ASM5P23S09A. It accepts one reference input and drives out five low-skew clocks.

The -1H version of the ASM5P23SxxA operates at up to 133 MHz frequency, and has higher drive than the -1 device. All parts have on-chip PLLs that lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad.

The ASM5P23S09A has two banks of four outputs each, which can be controlled by the Select inputs as shown in the Select Input Decoding Table. If all the output clocks are not required, Bank B can be three-stated. The select input also allows the input clock to be directly applied to the outputs for chip and system testing purposes.

Multiple ASM5P23S09A and ASM5P23S05A devices can accept the same input clock and distribute it. In this case the skew between the outputs of the two devices is guaranteed to be less than 700 pS.

All outputs have less than 200 pS of cycle-to-cycle jitter. The input and output propagation delay is guaranteed to be less than 250 pS, and the output to output skew is guaranteed to be less than 250 pS.

The ASM5P23S09A and the ASM5P23S05A are available in two different configurations, as shown in the ordering information table. The ASM5P23SxxA-1 is the base part. The ASM5P23SxxA-1H is the high drive version of the -1 part and its rise and fall times are much faster than -1 part.

ASM5P23S05A Maximum Ratings

             Parameter Min Max Unit
Supply Voltage to Ground Potential -0.5 +7.0 V
DC Input Voltage (Except REF) -0.5 VDD + 0.5 V
DC Input Voltage (REF) -0.5 7 V
Storage Temperature -65 +150
Max. Soldering Temperature (10 sec)   260
Junction Temperature   150
Static Discharge Voltage
per MIL-STD-883, Method 3015)
  2000 V

ASM5P23S05A Features

* 15 MHz to 133 MHz operating range, compatible
   with CPU and PCI bus frequencies.
* Zero input - output propagation delay.
* Multiple low-skew outputs.
* Output-output skew less than 250 pS.
* Device-device skew less than 700 pS.
* One input drives 9 outputs, grouped as 4+4+1
   (ASM5P23S09A).
* One input drives 5 outputs (ASM5P23S05A).
* Less than 200 pS cycle-to-cycle jitter is compatible
   with Pentium® based systems.
* Test Mode to bypass PLL (ASM5P23S09A only,
   refer Select Input Decoding Table).
* Available in 16-pin, 150-mil SOIC and 4.4 mm
   TSSOP packages for ASM5P23S09A and in
   8-pin, 150-mil SOIC and 4.4 mm TSSOP
   packages for ASM5P23S05A.
* 3.3V operation
* Advanced 0.35< CMOS technology.
*'SpreadTrak'.

ASM5P23S05A Connection Diagram

ASM5P23S05A  Connection Diagram

ASM5P23S05A datasheet

ASM5P23S05A
PDF/DataSheet Download

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