AT25F2048N

`Serial Peripheral Interface (SPI) Compatible
` Supports SPI Modes 0 (0,0) and 3 (1,1)
` 20 MHz Clock Rate
` Byte Mode and 256-byte Page Mode for Program Operations
` Sector Architecture:
       -Four Sectors with 64K Bytes Eac
       -256 Pages per Secto
` Product Identification Mode
` Low-voltage Operation
       -2.7 (V<sub>CC</sub>= 2.7V to 3.6V )
` Sector Write Protection
       -Protect 1/4, 1/2 or Entire Arra
` Write Protect (WP) Pin and Write Disable Instructions for  both Hardware and Software Data Protection
` Self-timed Program Cycle (30 |ìs/Byte Typical
`Self-timed Sector Erase Cycle (1 second/Sector Typical)
` Single Cycle Reprogramming (Erase and Program) for Status Register
` High Reliability
       -Endurance: 10,000 Write Cycles Typica
` 8-lead JEDEC SOIC

The AT25F2048 provides 2,097,152 bits of serial reprogrammable Flash memory organized as 262,144 words of 8 bits each. The device is optimized for use in many ndustrial and commercial applications where low-power and low-voltage operation are essential. The AT25F2048 is available in a space-saving 8-lead JEDEC SOIC package.