MFG:ATMEL Package Cooled:Module 8/Module 2 D/C:08+
MFG: ATMEL
Package Cooled: Module 8/Module 2
D/C: 08+
Description: The AT90SC12836RCFT is a low-power, high-performance, 8-/16-bit microcontroller with ROM program memor...
The AT90SC12836RCFT is a low-power, high-performance, 8-/16-bit microcontroller with ROM program memory, EEPROM data memory, based on the secureAVR enhanced RISC architecture and with a dual interface (contact+contactless).
By executing powerful instructions in a single clock cycle, the AT90SC12836RCFT achieves throughputs close to 1 MIPS
per MHz. Its Harvard architecture includes 32 general-purpose working registers directly connected to the ALU, allowing two independent registers to be accessed in one single instruction executed in one clock cycle.
The AT90SC12836RCFT uses the secureAVR architecture that allows the linear addressing of up to 8M bytes of code and up to 16M bytes of data as well as a number of new functional and security features.
The AT90SC12836RCFT features 36K bytes of high-performance EEPROM (fast erase/write time, high endurance).This allows system developers to offer their customers a true 32K bytes EEPROM, while still being able to use the remaining 4K bytes for their own purposes (customization and patches, for example). The ability to map the EEPROM in the code space allows parts of the program memory to be reprogrammed in-system.
The cryptographic accelerator featured in the AT90SC12836RCFT is the new AdvX, a N-bit multiplier-accumulator dedicated to performing fast encryption and authentication functions. All cryptographic routines are executed on the secureAVR core which uses the AdvX accelerator during encryption/decryption. AdvX is based on a 32-bit technology, thus enabling fast computation and low power operation. AdvX supports standard finite fields arithmetic functions (including RSA, DSA, DH and ECC) and GF(2N) arithmetic functions (including ECC).
Additional security features include power, frequency and temperature protection logic, logical scrambling on program data and addresses, power analysis countermeasures, and memory accesses controlled by a supervisor mode.
This product is specifically designed for Smart Cards and targets Access Control and ID applications.
General
• High-performance, Low-power secureAVRTM Core Enhanced RISC Architecture
135 Powerful Instructions (Most Executed in a Single Clock Cycle)
• Bond Pad Locations Conforming to ISO 7816-2
• ESD Protection to ± 6000V
• Operating Ranges: from 2.7V to 5.5V
• Compliant with ICAO specifications; EMV 2000 Specifications; PC Industry Compatible
• Power-saving Wait and Very Low-power Stop Modes
• Power-up Detection
• Available in Wafers, Modules, Dual Interface Module, Contactless Module or Inlay and Industry-standard Packages
Contactless Mode
• Contactless Interface Controller (CIC) with Full Support for ISO/IEC 14443 Type A and B Protocols
• Supply Voltage Clamp and Regulation
• Full-bridge Power Rectification
• On-chip Tuning Capacitance: 10 pF up to 120 pF
• 3.4 MHz Internal Bus Maximum Frequency with a Clock Extracted From the External Clock and 20 (AVR®) or 40 MHz (AdvXTM) if the Clock is Internally Generated
• 13.56 MHz Clock Extraction
• 3.4 MHz Internal Bus Frequency
• Reader-to-card:
ISO/IEC Type A: 100% ASK Modulation and Modified Miller Bit Coding
ISO/IEC Type B: 10% ASK Modulation and NRZ Bit Coding
• Card-to-reader:
ISO/IEC Type A: Generation of 847.5Khz Subcarrier with OOK Modulation and Manchester Bit Coding
ISO/IEC Type B: Modulation of Incoming RF Carrier by Resistive Load Switching / Generation of 847.5Khz Subcarrier with BPSK Modulation / NRZ Data Encoding
• Baud Rates: Up to 424 kbps
• RF Frame: Up to 256 Bytes
Memory
• 128K Bytes of ROM Program Memory
• 36K Bytes of EEPROM, Including 128 OTP Bytes and 384-byte Bit-addressable Area
1 to 128-byte Program / Erase
1.25 ms Program / 1.25 ms Erase
Typically More than 500,000 Write/Erase Cycles at Temperatures of 250C
Minimum 10 Years Data Retention
• 5K Bytes of RAM + 256 Bytes of DMA Dedicated RAM
• 32K Bytes of ROM Dedicated to Atmel's Crypto Library
Peripherals
• One ISO 7816 Controller
Up to 625 kbps at 5 MHz
Compliant with T= 0 and T= 1 Protocols
• Two I/O Ports (Configurable to Support ISO7816-3, 2-wire protocols...)
• Programmable Internal Oscillator (Up to 40 Mhz for AdvX and Up to 20 Mhz for Internal CPU clock)
• Three16-bit Timers (Watchdog capability)
• Random Number Generator (RNG)
• 2-level, 8-vector Interrupt Controller
• Hardware DES and Triple DES (DPA, SPA, DEMA Resistant)
• Checksum Accelerator
• CRC 16 & 32 Engine (Compliant with ISO/IEC 3309)
• 32-Bit AdvX Cryptographic Accelerator for Public Key Operations
RSA, DSA, ECC, Diffie-Hellman
• DMA Controller (Used to Speed-Up Data Transfers when Communicating via the Contactless Interface)
Security
• Dedicated Hardware for Protection Against SPA/DPA/DEMA Attacks
• Advanced Protection Against Physical Attack, Including Active Shield
• Environmental Protection Systems
• Voltage Monitor
• Frequency Monitor
• Temperature Monitor
• Light Protection
• Secure Memory Management/Access Protection (Supervisor Mode)
• Designed to meet Common Criteria EAL4+
Development Tools
• Voyager Emulation Platform (ATV4 Advanced) to Support Software Development
• IAR Embedded Workbench® V3.20c Debugger or Atmel's AVR Studio® Version 4.07 or Above
• Software Libraries and Application Notes
AT90SC12836RCFT
PDF/DataSheet Download
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