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Part Number: AT91M63200

 

 

 

 

Description: The AT91M63200 is a member of the Atmel AT91 16/32-bit microcontroller family which is based on the AR...


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AT91M63200 General Description


The AT91M63200 is a member of the Atmel AT91 16/32-bit microcontroller family which is based on the ARM7TDMI processor core.This processor has a high-performance 32-bit RISC architecture with a high-density 16-bit instruction set and very low power consumption. In addition, a large number of internally banked registers result in very fast exception handling, making the device ideal for real-time control applications.

The AT91 ARM-based MCU family also features Atmels high-density, in-system programmable, nonvolatile memory technology.The AT91M63200 has a direct connection to off-chip memory, including Flash,through the External Bus Interface.The Multi-processor Interface (MPI) provides a high-performance interface with an external coprocessor or a high bandwidth peripheral.The AT91M63200 is manufactured using the Atmel high-density CMOS technology.By combining the ARM7TDMI microcontroller core with on-chip SRAM, a multi-processor interface and a wide range of peripheral functions on a monolithic chip, the AT91M63200 provides a highly-flexible and cost-effective solution to many compute-Rev intensive multi-processor applications.

AT91M63200 Features

Utilizes the ARM7TDMITM  ARM Thumb Processor Core
    High-performance 32-bit RISC Architectur
    High-density 16-bit Instruction Se
    Leader in MIPS/Wat
    Embedded ICE (In-circuit Emulation
2K Bytes Internal RAM
Fully-programmable External Bus Interface (EBI)
    Maximum External Address Space of 64M Byte
    Up to 8 Chip Select
    Software Programmable 8/16-bit External Data Bu
Multi-processor Interface (MPI)
    High-performance External Processor Interfac
    512 x 16-bit Dual-port RA
8-channel Peripheral Data Controller
8-level Priority, Individually Maskable, Vectored Interrupt Controller
    5 External Interrupts, Including a High-priority, Low-latency Interrupt Reques
58 Programmable I/O Lines
6-channel 16-bit Timer/Counter
    6 External Clock Input
    2 Multi-purpose I/O Pins per Channe
3 USARTs
    2 Dedicated Peripheral Data Controller (PDC) Channels per USAR
    Support for Up to 9-bit Data Transfer
Master/Slave SPI Interface
    2 Dedicated Peripheral Data Controller (PDC) Channel
    8- to 16-bit Programmable Data Lengt
    4 External Slave Chip Select
Programmable Watchdog Timer
Power Management Controller (PMC)
    CPU and Peripherals Can Be Deactivated Individuall
IEEE 1149.1 JTAG Boundary-scan on All Active Pins
Fully Static Operation: 0 Hz to 25 MHz (12 MHz at 1.8V)
1.8V to 3.6V Core Operating Voltage Range
2.7V to 5.5V I/O Operating Voltage Range
-40 to +85 Operating Temperature Range
Available in a 176-lead TQFP Package

AT91M63200 datasheet

AT91M63200
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