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Part Number: AT91SAM7S256
Description: Atmel's AT91SAM7S256 is a member of a series of low pincount Flash microcontrollers based on the 32-bit ARM RISC proces...
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AT91SAM7S256
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General Description
AT91SAM7S256 General Description
Atmel's AT91SAM7S256 is a member of a series of low pincount Flash microcontrollers based on the 32-bit ARM RISC processor. It features a 256 Kbyte high-speed Flash and a 64 Kbyte SRAM, a large set of peripherals, including a USB 2.0 device, and a complete set of system functions minimizing the number of external compo-nents. The device is an ideal migration path for 8-bit microcontroller users looking for additional performance and extended memory.
The embedded Flash memory can be programmed in-system via the JTAG-ICE interface or via a parallel interface on a production programmer prior to mounting. Built-in lock bits and a security bit protect the firmware from accidental overwrite and preserves its confidentiality.
The AT91SAM7S256 system controller includes a reset controller capable of managing the power-on sequence of the microcontroller and the complete system. Correct device operation can be monitored by a built-in brownout detector and a watchdog running off an integrated RC oscillator.
The AT91SAM7S256 is a general-purpose microcontroller. Its integrated USB Device port makes it an ideal device for peripheral applications requiring connectivity to a PC or cellular phone. Its aggressive price point and high level of integration pushes its scope of use far into the cost-sensitive, high-volume consumer market.
AT91SAM7S256 Features
• Incorporates the ARM7TDMI® ARM® Thumb® Processor
High-performance 32-bit RISC Architecture
High-density 16-bit Instruction Set
Leader in MIPS/Watt
Embedded ICE In-circuit Emulation, Debug Communication Channel Support
• 256 Kbytes of Internal High-speed Flash, Organized in 1024 Pages of 256 Bytes
Single Cycle Access at Up to 30 MHz in Worst Case Conditions
Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed
Page Programming Time: 4 ms, Including Page Auto-erase, Full Erase Time: 10 ms
10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, Flash Security Bit
Fast Flash Programming Interface for High Volume Production
• 64 Kbytes of Internal High-speed SRAM, Single-cycle Access at Maximum Speed
• Memory Controller (MC)
Embedded Flash Controller, Abort Status and Misalignment Detection
• Reset Controller (RSTC)
Based on Power-on Reset and Low-power Factory-calibrated Brownout Detector
Provides External Reset Signal Shaping and Reset Source Status
• Clock Generator (CKGR)
Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and one PLL
• Power Management Controller (PMC)
Software Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode
Three Programmable External Clock Signals
• Advanced Interrupt Controller (AIC)
Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected
• Debug Unit (DBGU)
2-wire UART and Support for Debug Communication Channel interrupt, Programmable ICE Access Prevention
• Periodic Interval Timer (PIT)
20-bit Programmable Counter plus 12-bit Interval Counter
• Windowed Watchdog (WDT)
12-bit key-protected Programmable Counter
Provides Reset or Interrupt Signals to the System
Counter May Be Stopped While the Processor is in Debug State or in Idle Mode
• Real-time Timer (RTT)
32-bit Free-running Counter with Alarm
Runs Off the Internal RC Oscillator
• One Parallel Input/Output Controller (PIOA)
Thirty-two Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
Input Change Interrupt Capability on Each I/O Line
Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output
• Eleven Peripheral Data Controller (PDC) Channels
• One USB 2.0 Full Speed (12 Mbits per second) Device Port
On-chip Transceiver, 328-byte Configurable Integrated FIFOs
• One Synchronous Serial Controller (SSC)
Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
I²S Analog Interface Support, Time Division Multiplex Support
High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
• Two Universal Synchronous/Asynchronous Receiver Transmitters (USART)
Individual Baud Rate Generator, IrDA Infrared Modulation/Demodulation
Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support
Full Modem Line Support on USART1
• One Master/Slave Serial Peripheral Interface (SPI)
8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
• One Three-channel 16-bit Timer/Counter (TC)
Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
• One Four-channel 16-bit PWM Controller (PWMC)
• One Two-wire Interface (TWI)
Master Mode Support Only, All Two-wire Atmel EEPROMs Supported
• One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os
• IEEE 1149.1 JTAG Boundary Scan on All Digital Pins
• 5V-tolerant I/Os, including Four High-current Drive I/O lines, Up to 16 mA Each
• Power Supplies
Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External Components
3.3V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash Power Supply
1.8V VDDCORE Core Power Supply with Brownout Detector
• Fully Static Operation: Up to 55 MHz at 1.65V and 85°C Worst Case Conditions
• Available in a 64-lead LQFP Package
High-performance 32-bit RISC Architecture
High-density 16-bit Instruction Set
Leader in MIPS/Watt
Embedded ICE In-circuit Emulation, Debug Communication Channel Support
• 256 Kbytes of Internal High-speed Flash, Organized in 1024 Pages of 256 Bytes
Single Cycle Access at Up to 30 MHz in Worst Case Conditions
Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed
Page Programming Time: 4 ms, Including Page Auto-erase, Full Erase Time: 10 ms
10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, Flash Security Bit
Fast Flash Programming Interface for High Volume Production
• 64 Kbytes of Internal High-speed SRAM, Single-cycle Access at Maximum Speed
• Memory Controller (MC)
Embedded Flash Controller, Abort Status and Misalignment Detection
• Reset Controller (RSTC)
Based on Power-on Reset and Low-power Factory-calibrated Brownout Detector
Provides External Reset Signal Shaping and Reset Source Status
• Clock Generator (CKGR)
Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and one PLL
• Power Management Controller (PMC)
Software Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode
Three Programmable External Clock Signals
• Advanced Interrupt Controller (AIC)
Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected
• Debug Unit (DBGU)
2-wire UART and Support for Debug Communication Channel interrupt, Programmable ICE Access Prevention
• Periodic Interval Timer (PIT)
20-bit Programmable Counter plus 12-bit Interval Counter
• Windowed Watchdog (WDT)
12-bit key-protected Programmable Counter
Provides Reset or Interrupt Signals to the System
Counter May Be Stopped While the Processor is in Debug State or in Idle Mode
• Real-time Timer (RTT)
32-bit Free-running Counter with Alarm
Runs Off the Internal RC Oscillator
• One Parallel Input/Output Controller (PIOA)
Thirty-two Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
Input Change Interrupt Capability on Each I/O Line
Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output
• Eleven Peripheral Data Controller (PDC) Channels
• One USB 2.0 Full Speed (12 Mbits per second) Device Port
On-chip Transceiver, 328-byte Configurable Integrated FIFOs
• One Synchronous Serial Controller (SSC)
Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
I²S Analog Interface Support, Time Division Multiplex Support
High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
• Two Universal Synchronous/Asynchronous Receiver Transmitters (USART)
Individual Baud Rate Generator, IrDA Infrared Modulation/Demodulation
Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support
Full Modem Line Support on USART1
• One Master/Slave Serial Peripheral Interface (SPI)
8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
• One Three-channel 16-bit Timer/Counter (TC)
Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
• One Four-channel 16-bit PWM Controller (PWMC)
• One Two-wire Interface (TWI)
Master Mode Support Only, All Two-wire Atmel EEPROMs Supported
• One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os
• IEEE 1149.1 JTAG Boundary Scan on All Digital Pins
• 5V-tolerant I/Os, including Four High-current Drive I/O lines, Up to 16 mA Each
• Power Supplies
Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External Components
3.3V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash Power Supply
1.8V VDDCORE Core Power Supply with Brownout Detector
• Fully Static Operation: Up to 55 MHz at 1.65V and 85°C Worst Case Conditions
• Available in a 64-lead LQFP Package
AT91SAM7S256 Connection Diagram
AT91SAM7S256
PDF/DataSheet Download
- Datasheet: AT91SAM7S256
- File Size: 328077 KB
- Manufacturer: ATMEL [ATMEL Corporation]
- Click here to Download
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