ATMEGA88PA-AU

The ATMEGA88PA-AU is one member of the ATMEGA88PA series.The ATmega88PA is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega88PA achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.

Features of the ATMEGA88PA-AU are:(1)131 powerful instructions most single clock cycle execution; (2)32 x 8 general purpose working registers; (3)fully static operation; (4)up to 20 MIPS throughput at 20 MHz; (5)On-chip 2-cycle multiplier; (6)two 8-bit timer/counters with separate prescaler and compare mode; (7)one 16-bit timer/counter with separate prescaler, compare mode, and capture mode; (8)real time counter with separate oscillator; (9)six pwm channels; (10)programmable serial usart; (11)master/slave spi serial interface; (12)programmable watchdog timer with separate on-chip oscillator; (13)on-chip analog comparator; (14)interrupt and wake-up on pin change.

The absolute maximum ratings of the ATMEGA88PA-AU can be summarized as:(1)power supply:1.8 to 5.5V;(2)operatial temperature range:-40 to 85.The device is manufactured using Atmel's high density non-volatile memory technology. The On-chip ISP Flash allows the program memory to be reprogrammed In-System through an SPI serial interface, by a conventional non-volatile memory programmer, or by an On-chip Boot program running on the AVR core. The Boot program can use any interface to download the application program in the Application Flash memory. Software in the Boot Flash section will continue to run while the Application Flash section is updated, providing true Read-While-Write operation. By combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic chip, the Atmel ATMEGA88PA-AU is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications.In Power-save mode, the asynchronous timer continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except asynchronous timer and ADC, to minimize switching noise during ADC conversions. In Standby mode, the crystal/resonator Oscillator is running while the rest of the device is sleeping. This allows very fast start-up combined with low power consumption.