ATTINY13V-10SU

The ATTINY13V-10SU is one member of the ATTINY13 series.The ATtiny13 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture.By executing powerful instructions in a single clock cycle, the ATtiny13 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.

Features of the ATTINY13V-10SU are:(1)debugWIRE on-chip debug system; (2)in-system programmable via spi port; (3)external and internal interrupt sources; (4)low power idle, ADC noise reduction, and power-down modes; (5)enhanced power-on reset circuit; (6)programmable brown-out detection circuit; (7)internal calibrated oscillator; (8)one 8-bit timer/counter with prescaler and two PWM channels; (9)4-channel, 10-bit ADC with Internal voltage reference; (10)programmable watchdog timer with separate on-chip oscillator; (11)on-chip analog comparator.

The absolute maximum ratings of the ATTINY13V-10SU can be summarized as:(1)operating temperature range:-40 to 85;(2)power supply:2.7 to 5.5V.The AVR core combines a rich instruction set with 32 general purpose working registers.All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.The device ATTINY13V-10SU is manufactured using Atmel's high density non-volatile memory technology.The On-chip ISP Flash allows the Program memory to be re-programmed In-System through an SPI serial interface, by a conventional non-volatile memory programmer or by an On-chip boot code running on the AVR core.The ATtiny13 AVR is supported with a full suite of program and system development tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators, and Evaluation kits.Port B is a 6-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running.