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Part Number: AX250

 

 

 

 

Description: Axcelerator offers high performance at densities of up to two million equivalent system gates. Based u...


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AX250 General Description


Axcelerator offers high performance at densities of up to two million equivalent system gates. Based upon the Actel AX architecture, Axcelerator has several systemlevel features such as embedded SRAM (with complete FIFO control logic), PLLs, segmentable clocks, chip-wide highway routing, and carry logic.



AX250 Maximum Ratings

Symbol Parameter Limits Units
VCCA DC Core Supply Voltage 0.3 to 1.6 V
VCCA DC Core Supply Voltage 0.3 to 3.75 V
VCCI DC I/O Supply Voltage 0.3 to 3.75 V
VREF DC I/O Reference Voltage 0.3 to 3.75 V
VI Input Voltage 0.3 to 3.75 V
VO Output Voltage 0.3 to 3.75 V
TSTG Storage Temperature 60 to +150
VCCDA* Supply Voltage for Differential I/Os 0.3 to 3.75 V
Note: * Should be the maximum of all VCCI.

AX250 Features

• Up to 100% Resource Utilization with 100% Pin Locking
• 1.5V Core Voltage for Low Power
• Footprint Compatible Packaging
• Flexible, Multi-Standard I/Os:
1.5V, 1.8V, 2.5V, 3.3V Mixed Voltage Operation
Bank-Selectable I/Os 8 Banks per Chip
Single-Ended I/O Standards: LVTTL, LVCMOS, 3.3V PCI, and 3.3V PCI-X
Differential I/O Standards: LVPECL and LVDS
Voltage-Referenced I/O Standards: GTL+, HSTL Class 1, SSTL2 Class 1 and 2, SSTL3 Class 1 and 2
Registered I/Os
Hot-Swap Compliant I/Os (except PCI)
Programmable Slew Rate and Drive Strength on Outputs
Programmable Delay and Weak Pull-Up/Pull-Down Circuits on Inputs
• Embedded Memory:
Variable-Aspect 4,608-bit RAM Blocks (x1, x2, x4, x9, x18, x36 Organizations Available)
Independent, Width-Configurable Read and Write Ports
Programmable Embedded FIFO Control Logic
• Segmentable Clock Resources
• Embedded Phase-Locked Loop:
14-200 MHz Input Range
Frequency Synthesis Capabilities up to 1 GHz
• Deterministic, User-Controllable Timing
• Unique In-System Diagnostic and Debug Capability with Actel Silicon Explorer II
• Boundary-Scan Testing Compliant with IEEE Standard 1149.1 (JTAG)
• FuseLockTM Secure Programming Technology Prevents Reverse Engineering and Design Theft


AX250 datasheet

AX2596
PDF/DataSheet Download

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