AZ10E116

The AZ10/100E116 is a quint differential line receiver with emitter-follower outputs. The E116 provides a VBB output for single-ended use or a DC bias reference for AC coupling to the device. For single-ended input applications, the VBB reference should be connected to one side of the Dn/D¯n differential input pair. The input signal is then fed to the other Dn/D¯n input. The VBB pin should be used only as a bias for the E116 as its sink/source capability is limited. When used, the VBB pin should be bypassed to ground via a 0.01F capacitor.

The receiver design features clamp circuitry to cause a defined state if both the inverting and non-inverting inputs are left open; in this case the Q output goes LOW, while the Q¯ output goes HIGH. This feature makes the evice ideal for twisted pair applications.

If both inverting and non-inverting inputs are at an equal potential of > VCC -2.5V, the receiver does not go to a defined state. This condition may produce output voltage levels between HIGH and LOW.

NOTE: Specifications in ECL/PECL tables are valid when thermal equilibrium is established.