Am29F016

5.0 Volt ± 10% for read and write operations
- Minimizes system level power requirements
Compatible with JEDEC-standards
- Pinout and software compatible withsingle-power supply Flash
- Superior inadvertent write protection
48-pin TSOP
44-pin SO
Minimum 100,000 write/erase cycles guaranteed
High performance
- 70 ns maximum access time
Sector erase architecture
- Uniform sectors of 64 Kbytes each
- Any combination of sectors can be erased.Also supports full chip erase
Group sector protection
- Hardware method that disables any combination of sector groups from write or erase operations
(a sector group consists of 4 adjacent sectors of 64 Kbytes each)
Embedded Erase Algorithms
- Automatically pre-programs and erases the chip or any sector
Embedded Program Algorithms
- Automatically programs and verifies data atspecified address
Data =Polling and Toggle Bit feature fordetection of program or erase cyclecompletion
Ready/ Busy )output (RY/BY )
- Hardware method for detection of program or erase cycle completion
Erase Suspend/Resume
- Supports reading or programming data to a sector not being erasedn Low power consumption
- 25 mA typical active read current
- 30 mA typical program/erase current
Enhanced power management for standby mode
-<1 µA typical standby current
- Standard access time from standby mode
Hardware RESET pin
- Resets internal state machine to the read mode