Am29LV640MU

The Am29LV640MU is a 64 Mbit, 3.0 volt single powersupply flash memory device organized as 4,194,304words. The device has a 16-bit only data bus, and canbe programmed either in the host system or in stan-dard EPROM programmers.

An access time of 90, 100, 110, or 120 ns is available.Note that each access time has a specific operatingvoltage range (V_CC) and an I/O voltage range (V_IO), as specified in the Product Selector Guide and the Order-ing Information sections. The device is offered in a63-ball Fine-Pitch BGA or 64-ball Fortified BGA pack-age. Each device has separate chip enable (CE#),write enable (WE#) and output enable (OE#) controls.

Each device requires only a single 3.0 volt powersupply for both read and write functions. In addition toa V_CC  input, a high-voltage accelerated program(A^_CC) input provides shorter programming timesthrough increased current. This feature is intended tofacilitate factory throughput during system production,but may also be used in the field if desired.

The device is entirely command set compatible withthe JEDEC single-power-supply Flash standard.Commands are written to the device using standardmicroprocessor write timing. Write cycles also inter-nally latch addresses and data needed for the pro-gramming and erase operations.

The sector erase architecture allows memory sec-tors to be erased and reprogrammed without affectingthe data contents of other sectors. The device is fullyerased when shipped from the factory.

Device programming and erasure are initiated throughcommand sequences. Once a program or erase oper-ation has begun, the host system need only poll theDQ7 (Data# Polling) or DQ6 (toggle) status bits ormonitor the Ready/Busy# (RY/BY#) output to deter-mine whether the operation is complete. To facilitateprogramming, an Unlock Bypass mode reduces com-mand sequence overhead by requiring only two writecycles to program data instead of four.

The VersatileI/O(^TM) (V_IO ) control allows the host sys-IOtem to set the voltage levels that the device generatesand tolerates on the CE# control input and DQ I/Os tothe same voltage level that is asserted on the V_IO pin.IORefer to the Ordering Information section for valid V_IOoptions.

Hardware data protection measures include a lowV_CC detector that automatically inhibits write opera-tions during power transitions. The hardware sectorprotection feature disables both program and eraseoperations in any combination of sectors of memory.This can be achieved in-system or via programmingequipment.

The Erase Suspend/Erase Resume feature allowsthe host system to pause an erase operation in agiven sector to read or program any other sector andthen complete the erase operation. The ProgramSuspend/Program Resume feature enables the hostsystem to pause a program operation in a given sectorto read any other sector and then complete the pro-gram operation.

The hardware RESET# pin terminates any operationin progress and resets the device, after which it is thenready for a new operation. The RESET# pin may betied to the system reset circuitry. A system reset wouldthus also reset the device, enabling the host system toread boot-up firmware from the Flash memory device.

The device reduces power consumption in thestandby mode when it detects specific voltage levelson CE# and RESET#, or when addresses have beenstable for a specified period of time.

The SecSi(TM) (Secured Silicon) Sector provides a128-word area for code or data that can be perma-nently protected. Once this sector is protected, no fur-ther changes within the sector can occur.

AMD MirrorBit flash technology combines years ofFlash memory manufacturing experience to producethe highest levels of quality, reliability and cost effec-tiveness. The device electrically erases all bits within asector simultaneously via hot-hole assisted erase. Thedata is programmed using hot electron injection.