BCM1255

Description

The BCM1255 device is an MIPS64 processor core-based system-on-achip (SOC) that offers industry-leading performance, high functional integration, and low-power levels required by next-generation computing, storage, and networking applications.

The BCM1255 is a chip multiprocessor (CMP) system consisting of two Broadcom SB-1 high-performance MIPS64 CPUs, a shared 512-KB L2 cache, a DDR memory controller, and integrated I/O. All major blocks of the BCM1255 are connected together via the ZBbus, a high-speed, split-transaction multiprocessor bus. The bus implements the standard MESI protocol to ensure coherency between the two CPUs, L2 cache, I/O agents, and memory. Four Gigabit-Ethernet MACs (10/100/1000) enable easy interfacing to LANs or control backplanes.