BS62LV1024

Features:

* Wide Vcc operation voltage : 2.4V ~ 5.5V
* Very low power consumption :
     Vcc = 3.0V     C-grade : 20mA (Max.) operating current
                           I- grade : 25mA (Max.) operating current
                           0.02uA  (Typ.) CMOS standby current
    Vcc = 5.0V     C-grade : 35mA (Max.) operating current
                          I- grade : 40mA (Max.) operating current
                          0.4uA  (Typ.) CMOS standby current
* High speed access time :
                          -70          70ns (Max.)  at Vcc = 3.0V
* Automatic power down when chip is deselected
* Three state outputs and TTL compatible
* Fully static operation
* Data retention supply voltage as low as 1.5V
* Easy expansion with CE2, CE1, and OE options


Pinout




Specifications

SYMBOL	PARAMETER	RATING	UNITS
VTERM	Terminal Voltage with Respect to GND	-0.5 toVcc+0.5	V
TBIAS	Temperature Under Bias	-40 to +125	OC
TSTG	Storage Temperature	-60 to +150	OC
PT	Power Dissipation	1.0	W
IOUT	DC Output Current	20	mA

Description

The  BS62LV1024  is  a  high  performance, very   low  power   CMOS  Static Random Access Memory organized as 131,072 words  by 8 bits and operates from a wide range of 2.4V to 5.5V supply voltage. Advanced  CMOS  technology and circuit techniques of BS62LV1024 provide both high speed and low  power features with a typical CMOS standby current of 0.02uA and maximum access time of 70ns in 3V operation. Easy  memory  expansion   is   provided   by  an  active   LOW  chip enable (CE1),   an  active  HIGH  chip  enable (CE2),  and  active LOW output   enable (OE)  and  three-state output drivers.  The BS62LV1024 has an automatic  power down feature, reducing the power consumption significantly when chip is deselected. The  BS62LV1024 is available in DICE form, JEDEC standard 32 pin 450mil Plastic SOP, 300mil Plastic SOJ, 600mil Plastic DIP, 8mmx13.4mm  STSOP and 8mmx20mm TSOP.