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BU8710AKS
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General Description

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MFG:N/A Package Cooled:QFP D/C:08+

BU8 Series Datasheet download

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Part Number: BU8710AKS

MFG: N/A

Package Cooled: QFP

D/C: 08+

Description: This is an ADPCM transcoder which conforms to the G.721 standards listed in the 1988 edition of the CCITT recommen-dati...

BU8710AKS General Description

This is an ADPCM transcoder which conforms to the G.721 standards listed in the 1988 edition of the CCITT recommen-dations. Simultaneous processing of four encoder and decoder channels is possible, enabling superb affinity with the quadruple TDMA which is a standard for PHS (personal handy phone) systems. In turn, this enables voice processing units for individual base stations in the public telephone network to be configured on single chips.

BU8710AKS Maximum Ratings

Parameter	Symbol	Limits	Unit
Power supply voltage	V_DD	7.0	V
Input voltage	V_IN	V_SS-0.3~V_DD+0.3	V
Output voltage	V_OUT	V_SS-0.3~V_DD+0.3	V
Operating temperature	Topr	-25~+75
Storage temperature	Tstg	-55~+125

BU8710AKS Features

1) Can be connected to -law and A-law PCM codec through a serial interface. (Both long frames and short frames can be accommodated.)
2) Various functions can be controlled through a CPU interface.
3) An internal power save mode can be controlled separately for individual channels. (Separate encoder and decoder control are possible.) In addition, external pin control enables power consumption to be reduced for the chip as a whole.
4) An internal muting function can be controlled separately for individual channels. (Separate encoder and decoder control are possible.)
5) An internal function silence detection is provided, which can be controlled separately for individual channels. Applicable only to encoders.)
6) An internal background noise generation function is provided, which can be controlled separately for individual channels. (Applicable only to decoders.)
7) The G.711 (-law or A-law) output level can be attenuated freely on individual channels.
8) An internal 64kbps data through mode is provided, which can be controlled separately for individual channels.
9) Internal 32kbps and 64kbps data loop back modes are provided, which can be controlled separately for individual channels.
10) An internal clock generator circuit is provided.
11) SQFP 80 pin package is used.

BU8710AKS Typical Application

PHS base stations

BU8710AKS Connection Diagram

BU8710AKS datasheet

BU8710AKS
PDF/DataSheet Download

Datasheet: BU8710AKS
File Size: 615850 KB
Manufacturer: ROHM [Rohm]
Click here to Download

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