CA3306C

DC Supply Voltage Range, V_DD
Voltage Referenced to V_SS Terminal . . . . . . . . . . . -0.5V to +8.5V
Input Voltage Range
All Inputs Except Zener. . . . . . . . . . . . . . . . . -0.5V to VDD + 0.5V
DC Input Current
CLK, PH, CE1 , CE2, VIN . . . . . . . . . . . . . . . . . . . . . . . . . ±20mA

The CA3306 family are CMOS parallel (FLASH) analog-to-digital converters designed for applications demanding both low power consumption and high speed digitization. Digitizing at 15MHz, for example, requires only about 50mW.

The CA3306 family operates over a wide, full scale signal input voltage range of 1V up to the supply voltage. Power consumption is as low as 15mW, depending upon the clock frequency selected. The CA3306 types may be directly retrofitted into CA3300 sockets, offering improved linearity at a lower reference voltage and high operating speed with a 5V supply.

The intrinsic high conversion rate makes the CA3306 types ideally suited for digitizing high speed signals. The overflow bit makes possible
the connection of two or more CA3306s in series to increase the resolution of the conversion system. A series connection of two CA3306s may be used to produce a 7-bit high speed converter. Operation of two CA3306s in parallel doubles the conversion speed (i.e., increases the sampling rate from 15MHz to 30MHz).

Sixty-four paralleled auto balanced comparators measure the input voltage with respect to a known reference to produce the parallel bit
outputs in the CA3306. Sixty-three comparators are required to quantize all input voltage levels in this 6-bit converter, and the additional
comparator is required for the overflow bit.